A display device includes a base substrate, a first transistor, a second transistor, an organic light emitting diode, and a capacitor electrically connected to the first thin film transistor. The first transistor includes a first semiconductor pattern below a first interlayer insulation layer and a first control electrode above the first interlayer insulation layer and below a second interlayer insulation layer. The second transistor includes a second control electrode above the first interlayer insulation layer and below the second interlayer insulation layer. A second semiconductor pattern is above the second interlayer insulation layer.

A display device includes a base substrate, a first transistor, a second transistor, an organic light emitting diode, and a capacitor electrically connected to the first thin film transistor. The first transistor includes a first semiconductor pattern below a first interlayer insulation layer and a first control electrode above the first interlayer insulation layer and below a second interlayer insulation layer. The second transistor includes a second control electrode above the first interlayer insulation layer and below the second interlayer insulation layer. A second semiconductor pattern is above the second interlayer insulation layer.

A method for enhancing aggregation state stability of organic semiconductor (OSC) films includes constructing the OSC film; introducing uniform and discontinuous nanoparticles on a surface of the film or an inside of the film. Electrical properties of the OSC film are not influenced by introducing the nanoparticles. Grain boundary, dislocation, stacking fault, and surface of the film are pinned by the nanoparticles, increasing potential barrier of the aggregation state evolution of the film, and thus enhancing the stability of the aggregation state and greatly improving maximum working temperature and storage lifetime of organic field-effect transistors. Under room temperature storage, morphology of the OSC film introduced with the nanoparticles is difficult to change, so that the stability of electrical properties of organic transistor components prepared from the film is ensured in a high-temperature and atmospheric working environment.

A light-emitting element includes an anode, an HTL, an EML, an ETL, and a cathode layered in this order, the HTL includes at least one protruding portion protruding in a layering direction, and an IL overlapping the protruding portion in a plan view is provided between the protruding portion and the EML.

A top-emitting pixel device is disclosed. The pixel device may include a reflective bottom electrode disposed over a substrate, a first charge transport layer disposed over the reflective bottom electrode, an emissive layer disposed over the first charge transport layer, and a second charge transport layer disposed over the emissive layer. Further, the pixel device may include a patterned transparent polymer electrode disposed over the second charge transport layer and extending laterally to cover an emissive area of the top-emitting pixel device, and a patterned auxiliary electrode disposed at least partially over the patterned transparent polymer electrode outside of the emissive area of the top-emitting pixel device to make direct electrical contact with the patterned transparent polymer electrode.

A display device including a substrate having a display area and a peripheral area defined outside the display area, a circuit layer disposed on the substrate, a device layer disposed on the display area, an encapsulation layer covering the device layer, a touch sensing unit including at least one touch insulating layer disposed on the encapsulation layer, touch electrodes disposed on the encapsulation layer, and touch signal lines connected to the touch electrodes, a first section disposed in the peripheral area and including a first part having a first thickness, a second part having a second thickness less than the first thickness and overlapping the touch signal lines, and an intermediate part connecting the first part and the second part and being inclined, and a first thickening pattern overlapping at least the intermediate part.

Disclosed relates to a transparent display panel and manufacturing method of thereof, and the transparent display panel including a patterned cathode with improved transparency as a whole.

The present disclosure provides an array substrate, a preparation method thereof, and a display device. The array substrate has an opening area and a hole border area. A method of preparation of the array substrate includes: forming a source-drain metal layer on a side of the base substrate, wherein the source-drain metal layer is formed with a first isolation pillar surrounding the opening area in the hole border area, and the first isolation pillar includes a first metal layer and a second metal layer located on a side of the first metal layer away from the base substrate; forming a planarization layer covering at least a lateral surface of each first metal layer; forming a pixel electrode layer; forming a protective layer covering the pixel electrode layer, the protective layer exposing the hole border area; removing a part of the planarization layer located in the hole border area; partially etching the first metal layer from the lateral surface to form a third metal layer; removing the protective layer; forming an organic light emitting layer and a common electrode layer in sequence. The preparation method of the array substrate can improve the yield of the array substrate.

An electronic device and a manufacturing method thereof are provided. The electronic device includes an array substrate, which includes a substrate, a first conductive layer, a first insulating layer, a second conductive layer, and a second insulating layer. The substrate has a substrate surface. The first conductive layer is located on the substrate surface. The first insulating layer is located on the first conductive layer. The second conductive layer is located on the first insulating layer and includes a first sputtering layer, a second sputtering layer, and a third sputtering layer. The second insulating layer is located on the second conductive layer. The second sputtering layer is located between the first and third sputtering layers, and includes a first metal element. The first sputtering layer includes the first metal element and a second metal element. The third sputtering layer includes the first metal element and a third metal element.

An organic interposer includes dielectric material layers embedding redistribution interconnect structures, package-side bump structures located on a first side of the dielectric material layers, and die-side bump structures located on a second side of the dielectric material layers. A gap region is present between a first area including first die-side bump structures and a second area including second die-side bump structures. Stress-relief line structures are located on, or within, the dielectric material layers within an area of the gap region in the plan view. Each stress-relief line structures may include straight line segments that laterally extend along a respective horizontal direction and is not electrically connected to the redistribution interconnect structures. The stress-relief line structures may include the same material as, or may include a different material from, a metallic material of the redistribution interconnect structures or bump structures that are located at a same level.