H10N50/01

Single magnetic-layer microwave oscillator

A method and system for generating voltage and/or current oscillations in a single magnetic layer is provided. The method comprises applying a direct voltage/current to the layer in a longitudinal direction; and developing a longitudinal voltage between a pair of longitudinal voltage leads and/or a transverse voltage between a pair of transverse voltage leads. The magnetic layer comprises a ferrimagnetic or antiferrimagnetic material having a first and second magnetic sub-lattice, wherein the first sub-lattice is a dominant sub-lattice such that the charge carriers at the Fermi energy originate predominantly from the dominant sub-lattice and the charge carriers at the Fermi energy are spin polarised. In some embodiments, the dominant current carrying sub-lattice may lack inversion symmetry.

Semiconductor devices including spin-orbit torque line and contact plug

A semiconductor device includes first and second contact plugs in an insulating layer that is on a substrate, the first and second contact plugs spaced apart from each other. A spin-orbit torque (SOT) line on the insulating layer and overlapping the first and second contact plug is provided. A magnetic tunnel junction (MTJ) is on the SOT line. An upper electrode is on the MTJ. Each of the first and second contact plugs includes a recess region adjacent the SOT line. A sidewall of the recess region is substantially coplanar with a side surface of the SOT line and a side surface of the MTJ.

Substrate processing apparatus and method

A substrate processing apparatus includes a processing chamber where a substrate support on which a substrate is placed and a target holder configured to hold a target are disposed, a freezing device disposed with a gap with respect to a bottom surface of the substrate support and having a chiller and a cold heat medium laminated on the chiller, and a rotating device configured to rotate the substrate support. The substrate processing apparatus further includes a first elevating device configured to raise and lower the substrate support, a coolant channel formed in the chiller to supply a coolant to the gap, and a cold heat transfer material disposed in the gap and being in contact with the substrate support and the cold heat medium so as to transfer heat therebetween.

Method for forming semiconductor memory structure

A method for forming a semiconductor memory structure is provided. The method includes following operations. An interlayer is formed over a first ferromagnetic layer, wherein forming the interlayer includes following operations. A first metal film is formed by sputtering a first target material. A first oxygen treatment is conducted to the first metal film to form a first metal oxide film. A second metal oxide film is formed over the first metal oxide film by sputtering a second target material different from the first target material. A second metal film is formed by sputtering a third target material. A second oxygen treatment is conducted to the second metal film to form a third metal oxide film.

In-situ annealing and etch back steps to improve exchange stiffness in cobalt iron boride based perpendicular magnetic anisotropy free layers

A method for forming a memory device that includes providing a free layer of an alloy of cobalt (Co), iron (Fe) and boron (B) overlying a reference layer; and forming metal layer comprising a boron (B) sink composition atop the free layer. Boron (B) may be diffused from the free layer to the metal layer comprising the boron sink composition. At least a portion of the metal layer including the boron (B) sink composition is removed. A metal oxide is formed atop the free layer. The free layer may be a crystalline cobalt and iron alloy. An interface between the metal oxide and free layer can provide perpendicular magnetic anisotropy character.

MTJ device performance by controlling device shape

A layered thin film device, such as a MTJ (Magnetic Tunnel Junction) device can be customized in shape by sequentially forming its successive layers over a symmetrically curved electrode. By initially shaping the electrode to have a concave or convex surface, the sequentially formed layers conform to that shape and acquire it and are subject to stresses that cause various crystal defects to migrate away from the axis of symmetry, leaving the region immediately surrounding the axis of symmetry relatively defect free. The resulting stack can then be patterned to leave only the region that is relatively defect free.

Crystal seed layer for magnetic random access memory (MRAM)

Some embodiments relate to a memory device. The memory device includes a magnetoresistive random-access memory (MRAM) cell comprising a magnetic tunnel junction (MTJ). The MTJ device comprises a stack of layers, comprising a bottom electrode disposed over a substrate. A seed layer disposed over the bottom electrode. A buffer layer is disposed between the bottom electrode and the seed layer. The buffer layer prevents diffusion of a diffusive species from the bottom electrode to the seed layer.

Semiconductor device and method for fabricating the same

A method for fabricating semiconductor device includes the steps of: forming a magnetic tunneling junction (MTJ) on a substrate and a top electrode on the MTJ; forming a first inter-metal dielectric (IMD) layer around the MTJ and the top electrode; forming a stop layer on the first IMD layer; forming a second IMD layer on the stop layer; performing a first etching process to remove the second IMD layer and the stop layer; performing a second etching process to remove part of the top electrode; and forming a metal interconnection to connect to the top electrode.

Top electrode via with low contact resistance

The present disclosure, in some embodiments, relates to a memory device. The memory device includes a bottom electrode disposed over a lower interconnect within a lower inter-level dielectric (ILD) layer over a substrate. A data storage structure is over the bottom electrode. A first top electrode layer is disposed over the data storage structure, and a second top electrode layer is on the first top electrode layer. The second top electrode layer is less susceptible to oxidation than the first top electrode layer. A top electrode via is over and electrically coupled to the second top electrode layer.

Magnetoresistance effect element including at least one Heusler alloy layer and at least one discontinuous non-magnetic layer

A magnetoresistance effect element includes a first ferromagnetic layer, a second ferromagnetic layer, a first non-magnetic layer; and a second non-magnetic layer, wherein, the first ferromagnetic layer and the second ferromagnetic layer are formed so that at least one of them includes a Heusler alloy layer, the first non-magnetic layer is provided between the first ferromagnetic layer and the second ferromagnetic layer, the second non-magnetic layer is in contact with any surface of the Heusler alloy layer and has a discontinuous portion with respect to a lamination surface, and the second non-magnetic layer is made of a material different from that of the first non-magnetic layer and is a (001)-oriented oxide containing Mg.