An apparatus includes a substrate having a planar top surface, a sequence of crystalline semiconductor layers located on the planar surface, and first and second sets of electrodes located over the sequence. The sequence of crystalline semiconductor layers has a 2D quantum well therein. The first set of electrodes border opposite sides of a lateral region of the sequence and are controllable to vary a width of a non-depleted portion of the quantum well along the top surface. The second set of electrodes border first and second channels between the lateral region and first and second adjacent lateral areas of the sequence and are controllable to vary widths of non-depleted segments of the quantum well in the channels. The electrodes are located such that straight lines connecting the first and second lateral areas via the channels either pass between one of the electrodes and the substrate or are misaligned to an effective [1 1 0] lattice direction of the sequence.

Ion implantation or deposition can be used to modify the bulk electrical properties of topological insulators. More particularly, ion implantation or deposition can be used to compensate for the non-zero bulk conductivity due to extrinsic charge carriers. The direct implantation of deposition/annealing of dopants allows better control over carrier concentrations for the purposes of achieving low bulk conductivity. Ion implantation or deposition enables the fabrication of inhomogeneously doped structures, enabling new types of device designs.

Structures for a Hall sensor and methods of forming a structure for a Hall sensor. The structure includes a semiconductor body having a top surface and a sloped sidewall defining a Hall surface that intersects the top surface. The structure further includes a well in the semiconductor body and multiple contacts in the semiconductor body. The well has a section positioned in part beneath the top surface and in part beneath the Hall surface. Each contact is coupled to the section of the well beneath the top surface of the semiconductor body.

A magnetic sensor has a pair of Hall elements formed in spaced-apart relationship on a front surface of a semiconductor substrate. A die pad is bonded to a back surface of the semiconductor substrate and overlaps the Hall elements. The die pad has formed therein a magnetic converging plate holder having a recessed portion, and a magnetic converging plate having the same shape and size as the recessed portion is fitted in the recessed portion of the magnetic converging plate holder.

Methods for doping an active Hall effect region of a Hall effect device in a semiconductor substrate, and Hall effect devices having a doped active Hall effect region are provided. A method includes forming a first doping profile of a first doping type in a first depth region of the active Hall effect region by means of a first implantation with a first implantation energy level, forming a second doping profile of the first doping type in a second depth region of the active Hall effect region by means of a second implantation with a second implantation energy level, and forming an overall doping profile of the active Hall effect region by annealing the semiconductor substrate with the active Hall effect region having the first and the second doping profile.

In one aspect, a vertical Hall effect sensor includes a semiconductor wafer having a first conductivity type and a plurality of semiconductive electrodes disposed on the semiconductor wafer. The plurality of semiconductive electrodes have the first conductivity type and include a source electrode, a first sensing electrode and a second sensing electrode, arranged such that the source electrode is between the first sensing electrode and the sensing electrode and a first drain electrode and a second drain electrode, arranged such that the first sensing electrode, second sensing electrode, and source electrode are between the first drain electrode and the second drain electrode. The vertical Hall effect sensor also includes a plurality of semiconductor fingers disposed on the semiconductor wafer and interdigitated with the plurality of semiconductive electrodes, the semiconductor fingers having a second conductivity type.

An embodiment includes a magnetic tunnel junction (MTJ) including a free magnetic layer, a fixed magnetic layer, and a tunnel barrier between the free and fixed layers; the tunnel barrier directly contacting a first side of the free layer; and an oxide layer directly contacting a second side of the free layer; wherein the tunnel barrier includes an oxide and has a first resistance-area (RA) product and the oxide layer has a second RA product that is lower than the first RA product. The MTJ may be included in a perpendicular spin torque transfer memory. The tunnel barrier and oxide layer form a memory having high stability with an RA product not substantively higher than a less table memory having a MTJ with only a single oxide layer. Other embodiments are described herein.

The present invention provides a method for the production of an electronic device, the method comprising: (i) providing a substrate comprising first and second layers on a heated susceptor in a reaction chamber, the chamber having a plurality of cooled inlets arranged so that, in use, the inlets are distributed across the substrate and have a constant separation from the substrate, (ii) supplying a flow comprising a precursor compound through the inlets and into the reaction chamber to thereby decompose the precursor compound and form a graphene layer structure on a surface of the first layer of the substrate, wherein the inlets are cooled to less than 100° C. and the susceptor is heated to a temperature of at least 50° C. in excess of a decomposition temperature of the precursor, (iii) selectively laser ablating the graphene to expose one or more portions of the surface of the first layer of the substrate, and (iv) selectively laser ablating the surface of the first layer of the substrate to expose one or more portions of the second layer of the substrate, wherein the first layer is an electrically conductive layer and the second layer is an electrically insulative layer, or wherein the second layer is an electrically conductive layer and the first layer is an electrically insulative layer.

A coupler is disclosed that employs hall-effect sensing technology. Specifically, the coupler is configured to produce an output voltage by converting the magnetic field generated by a current conductor at an input side. The output and input sides may be electrically isolated from one another but may be coupled via the hall-effect sensing technology, such as a hall-effect sensor. The output and input sides may be provided in an overlapping configuration.

A magnetic memory device comprises a cylindrical core and a plurality of layers surrounding the core. The plurality of layers include a metallic buffer layer, a ferromagnetic storage layer, a barrier layer, and a ferromagnetic reference layer. The cylindrical core, the metallic buffer layer, the ferromagnetic storage layer, the barrier layer, and the ferromagnetic reference layer collectively form a magnetic tunnel junction. A magnetization of the ferromagnetic layer storage parallels an interface between the metallic buffer layer and ferromagnetic storage layer.