A spin-orbit torque magnetoresistance effect element according to the present embodiment includes an element part including a first ferromagnetic layer, a second ferromagnetic layer, and a nonmagnetic layer positioned between the first ferromagnetic layer and the second ferromagnetic layer, a spin-orbit torque wiring positioned in a first direction with respect to the element part, facing the first ferromagnetic layer of the element part, and extending in a second direction, a first conductive part and a second conductive part facing the spin-orbit torque wiring at positions sandwiching the element part when viewed from the first direction, and a gate part positioned between the first conductive part and the second conductive part when viewed from the first direction, facing a second surface of the spin-orbit torque wiring on a side opposite to a first surface which faces the element part, and including a gate insulating layer and a gate electrode in order from a position near the spin-orbit torque wiring, in which the spin-orbit torque wiring includes a semiconductor to which a scattering element is added.

Data storage devices are provided. A data storage device includes a memory transistor on a substrate and a data storage structure electrically connected to the memory transistor. The data storage structure includes a magnetic tunnel junction pattern and a top electrode on the magnetic tunnel junction pattern. The top electrode includes a first top electrode and a second top electrode on the first top electrode, and the first and second top electrodes include the same metal nitride. The first top electrode includes first crystal grains of the metal nitride, and the second top electrode includes second crystal grains of the metal nitride. In a section of the top electrode, the number of the first crystal grains per a unit length is greater than the number of the second crystal grains per the unit length.

The present disclosure generally relate to spin-orbit torque (SOT) devices comprising a topological insulator (TI) modulation layer. The TI modulation layer comprises a plurality of bismuth or bismuth-rich composition modulation layers, a plurality of TI lamellae layers comprising BiSb having a (012) crystal orientation, and a plurality of texturing layers. The TI lamellae layers comprise dopants or clusters of atoms, the clusters of atoms comprising a carbide, a nitride, an oxide, or a composite ceramic material. The clusters of atoms are configured to have a grain boundary glass forming temperature of less than about 400° C. Doping the TI lamellae layers comprising BiSb having a (012) crystal orientation with clusters of atoms comprising a carbide, a nitride, an oxide, or a composite ceramic material enable the SOT MTJ device to operate at higher temperatures while inhibiting migration of Sb from the BiSb of the TI lamellae layers.

The present disclosure generally relate to spin-orbit torque (SOT) devices comprising a topological insulator (TI) modulation layer. The TI modulation layer comprises a plurality of bismuth or bismuth-rich composition modulation layers, a plurality of TI lamellae layers comprising BiSb having a (012) crystal orientation, and a plurality of texturing layers. The TI lamellae layers comprise dopants or clusters of atoms, the clusters of atoms comprising a carbide, a nitride, an oxide, or a composite ceramic material. The clusters of atoms are configured to have a grain boundary glass forming temperature of less than about 400° C. Doping the TI lamellae layers comprising BiSb having a (012) crystal orientation with clusters of atoms comprising a carbide, a nitride, an oxide, or a composite ceramic material enable the SOT MTJ device to operate at higher temperatures while inhibiting migration of Sb from the BiSb of the TI lamellae layers.

A camera device according to the present embodiment comprises: a first operation part comprising one of a first coil or a magnet and arranged on a fixed member; a second operation part which comprises the other one of the first coil and the magnet, is arranged on a movable member, and faces the first operation part; a hall sensor facing one of the first operation part and the second operation part; and a second coil arranged near the hall sensor, wherein at least a portion of the second coil is arranged between the hall sensor and the first coil.

Embodiments disclosed herein include a semiconductor structure. The semiconductor structure may include a spin transfer torque (STT) magnetoresistive random access memory (MRAM) stack. The semiconductor structure may also include a spin orbit torque (SOT) MRAM stack vertically in series with the STT-MRAM. The SOT-MRAM stack may include a heavy metal spin hall effect rail configured to flip an SOT free-layer magnetic orientation in response to a horizontal signal through the heavy metal rail.

A perpendicular magnetization type three-terminal SOT-MRAM that does not need an external magnetic field is provided. A magnetoresistance effect element where a first magnetic layer/nonmagnetic spacer layer/recording layer are disposed in order, and the first magnetic layer and the nonmagnetic spacer layer are provided to a channel layer.

According to one embodiment, a spin injection source comprising a half Heusler alloy-topological semi-metal that has a surface state of Dirac type and that is in contact with a ferromagnet. The half Heusler alloy-topological semi-metal supplies a spin current to the ferromagnet based on a current flowing in a direction parallel to a first surface that is in contact with the ferromagnet.

A Hall sensor includes a Hall well, such as an implanted region in a surface layer of a semiconductor structure, and four doped regions spaced apart from one another in the implanted region. The implanted region and the doped regions include majority carriers of the same conductivity type. The sensor also includes a dielectric layer that extends over the implanted region, and an electrode layer over the dielectric layer to operate as a control gate to set or adjust the sensor performance. A first supply circuit provides a first bias signal to a first pair of the terminals, and a second supply circuit provides a second bias signal to the electrode layer.

A Hall sensor includes a Hall well, such as an implanted region in a surface layer of a semiconductor structure, and four doped regions spaced apart from one another in the implanted region. The implanted region and the doped regions include majority carriers of the same conductivity type. The sensor also includes a dielectric layer that extends over the implanted region, and an electrode layer over the dielectric layer to operate as a control gate to set or adjust the sensor performance. A first supply circuit provides a first bias signal to a first pair of the terminals, and a second supply circuit provides a second bias signal to the electrode layer.