Patent classifications
H10N60/01
QUANTUM COMPUTING DEVICES WITH AN INCREASED CHANNEL MOBILITY
Methods related to the treatment of a quantum computing device to increase channel mobility are described. An example method includes forming a superconducting metal layer on a surface of a wafer. The method further includes selectively removing a portion of the superconducting metal layer to allow a subsequent formation of a gate dielectric associated with the device, where the selectively removing causes a decrease in channel mobility associated with the quantum computing device. The method further includes prior to forming the gate dielectric, subjecting the wafer to a plasma treatment, where a set of parameters associated with the plasma treatment is selected to increase the channel mobility.
QUANTUM COMPUTING DEVICES WITH AN INCREASED CHANNEL MOBILITY
Methods related to the treatment of a quantum computing device to increase channel mobility are described. An example method includes forming a superconducting metal layer on a surface of a wafer. The method further includes selectively removing a portion of the superconducting metal layer to allow a subsequent formation of a gate dielectric associated with the device, where the selectively removing causes a decrease in channel mobility associated with the quantum computing device. The method further includes prior to forming the gate dielectric, subjecting the wafer to a plasma treatment, where a set of parameters associated with the plasma treatment is selected to increase the channel mobility.
OPTICAL COMMUNICATION IN QUANTUM COMPUTING SYSTEMS
Disclosed herein are assemblies for optical communication in quantum computing. For example, in some embodiments, a quantum computing assembly may include control circuitry having an optical interface to external electronic circuitry.
QUANTUM DEVICE AND METHOD OF OPERATING SAME
Described are various embodiments of a quantum device and method operating the same. In one embodiment, the quantum device comprises a substrate; a superconducting circuit element supported on a substrate surface of said substrate, the superconducting circuit element exhibiting superconductivity during operation of the quantum device; and a passive magnetic element, the passive magnetic element generating a magnetic field, the superconducting circuit element being directly or indirectly exposed to at least a portion of the magnetic field during operation of the quantum device. In some embodiments, the superconducting circuit element is indirectly exposed to the portion of the magnetic field, the portion of the magnetic field being guided, at least in part, from a first location proximate the passive magnetic element to a second location proximate the superconducting circuit element by one or more magnetic field guides.
Systems and methods for etching of metals
A method of fabricating a multilayer superconducting printed circuit board comprises first, forming a bimetal foil to overlie a substrate, the bimetal foil comprising a first layer of a first metal, a layer of a second metal, and a second layer of the first metal, and then etching the second layer of the first metal. Forming a bimetal foil to overlie a substrate may include forming a bimetal foil comprising a first layer of a normal metal, a layer of a superconducting metal, and a second layer of the normal metal. Etching the second layer of the first metal may include preparing a patterned image in the second layer of the first metal for etching, processing the patterned image through a cleaner, rinsing the patterned image, and then, immersing the patterned image in a microetch.
SUPERCONDUCTING MICROWAVE FILTERS AND FILTER ELEMENTS FOR QUANTUM DEVICES
A superconducting device is described wherein the device comprises a substrate; a capacitor structure (604) and a superconducting inductor structure (602) disposed on the substrate, the capacitor structure an the superconducting inductor structure forming a superconducting microwave filter structure, in particular a low-pass filter, the superconducting inductor structure including a plurality of nanowires of a superconducting material, each of the plurality of nanowires being galvanically connected to one of a plurality of capacitor electrodes (608) forming the capacitor structure, wherein the cross-sectional dimensions of the plurality of nanowires are selected such that the kinetic inductance of each of the one or more nanowires is larger, preferably substantially larger, than the geometrical inductance of the nanowire.
SUPERCONDUCTING MICROWAVE FILTERS AND FILTER ELEMENTS FOR QUANTUM DEVICES
A superconducting device is described wherein the device comprises a substrate; a capacitor structure (604) and a superconducting inductor structure (602) disposed on the substrate, the capacitor structure an the superconducting inductor structure forming a superconducting microwave filter structure, in particular a low-pass filter, the superconducting inductor structure including a plurality of nanowires of a superconducting material, each of the plurality of nanowires being galvanically connected to one of a plurality of capacitor electrodes (608) forming the capacitor structure, wherein the cross-sectional dimensions of the plurality of nanowires are selected such that the kinetic inductance of each of the one or more nanowires is larger, preferably substantially larger, than the geometrical inductance of the nanowire.
HARD MASK AND PREPARATION METHOD THEREOF, PREPARATION METHOD OF JOSEPHSON JUNCTION, AND SUPERCONDUCTING CIRCUIT
A hard mask includes a silicon oxide layer provided on a bare silicon wafer; and a silicon nitride layer provided on the silicon oxide layer, wherein the silicon nitride is provided with a first pattern, the silicon oxide layer is provided with a second pattern corresponding to the first pattern, the first pattern and the second pattern have different shapes, and the first pattern and the second pattern are configured to assist in forming a Josephson junction on the bare silicon wafer.
METHOD OF MAKING SUPERCONDUCTING INTERCONNECTIONS
The invention concerns an inteconnect device for interconnection between lines of superconducting material at least one via in contact with those lines, comprising:
a) a first substrate, which carries at least one first line of a first superconducting material;
b) at least one first via of a second superconducting material, different from the first superconducting material, said at least one first line being disposed between said first substrate and said first via;
c) at least one second line above said first via and in contact with the latter.
Fabrication Stack for High Integration Density Superconducting Digital Circuits
A fabrication stack comprises at least one Josephson junction, at least one capacitor, and one or more high kinetic inductance wires that comprise NbTiN. The one or more high kinetic inductance wires are configured to electrically couple the at least one Josephson junction to the at least one capacitor to form a superconducting circuit that facilitates switching a state of the Josephson junction via a single flux quantum (SFQ) pulse.