Among other things, an apparatus comprises quantum units; and couplers among the quantum units. Each coupler is configured to couple a pair of quantum units according to a quantum Hamiltonian characterizing the quantum units and the couplers. The quantum Hamiltonian includes quantum annealer Hamiltonian and a quantum governor Hamiltonian. The quantum annealer Hamiltonian includes information bearing degrees of freedom. The quantum governor Hamiltonian includes non-information bearing degrees of freedom that are engineered to steer the dissipative dynamics of information bearing degrees of freedom.

A method for performing quantum annealing computation for solving a discrete optimization problem includes the steps of: (a) identifying an operation for transferring an energy state of one of two physical systems (u, d) having the same quantum state to a low energy state and transferring an energy state of the other of the two physical systems to a high energy state; (b) constructing a network structure among a plurality of physical systems that indicates an order of application of the operation of the step (a) on two physical systems among the plurality of physical systems; and (c) obtaining a physical system having a minimum energy state in the plurality of physical systems by applying the operation of the step (a) to the plurality of physical systems according to the order indicated in the network structure of step (b).

A qubit device may include a closed loop comprising one or more polycrystalline spin-triplet superconductors. The closed loop may maintain a half-quantum magnetic flux in a ground state. A qubit device may include a closed loop comprising one or more single crystalline spin-triplet superconductors connected by one or more s-wave superconductors. The closed loop may maintain a half-quantum magnetic flux in a ground state.

In a masking phase, a first segment of an amorphous mask is formed on an underlying layer of a substrate. The first segment comprises a first set of trenches exposing the underlying layer. In the masking phase, a second segment of the amorphous mask is formed on the underlying layer. The second segment comprises a second set of trenches exposing the underlying layer. The segments are non-overlapping. An open end of one of the first set of trenches faces an open end of one of the second set of trenches, but the ends are separated by a portion of the amorphous mask. In a semiconductor growth phase, semiconductor material is grown, by selective area growth, in the first and second sets of trenches to form first and second sub-networks of nanowires on the underlying layer. The first and second sub-networks of nanowires are joined to form a single nanowire network.

A resonator, an oscillator, and a quantum computer in which the area occupied by the circuit can be reduced is provided. A resonator (100) includes a loop circuit (110) in which a first superconducting line (101), a first Josephson junction (103), a second superconducting line (102), and a second Josephson junction (104) are connected in a ring shape, and a capacitor (120). The capacitor (120) and the loop circuit (110) are connected in a ring shape.

A nanowire structure includes a substrate, a patterned mask layer on the substrate, and a nanowire. The patterned mask layer is on the substrate and includes an opening through which the substrate is exposed. The nanowire is on the substrate in the opening of the patterned mask layer. The nanowire includes a buffer layer on the substrate, a defect filtering layer on the buffer layer, and an active layer on the defect filtering layer. The defect filtering layer is a strained layer. By providing the defect filtering layer between the buffer layer and the active layer of the nanowire, defects present in the buffer layer can be prevented from propagating into the active layer. Accordingly, defects in the active layer of the nanowire are reduced, thereby improving the performance of the nanowire structure.

A heat transfer device and method are disclosed. The device includes a working region (i.e., working substance) made from a first superconducting material having a superconducting state and a normal state when magnetized. The first superconducting material has a first energy gap while in the superconducting state. A substrate (i.e., cold reservoir) is connected to the working region at a first tunnel junction. The substrate may be a metallic substrate. A heat sink (i.e., hot reservoir) is connected to the working region at a second tunnel junction. The heat sink is made from a second superconducting material having a second energy gap that is larger than the first energy gap. In a particular example, the heat transfer device includes a metallic substrate is made from Copper, a working region made from Tantalum, a heat sink made from Niobium, and the first and second tunnel junctions are made from Tantalum Oxide.

The present invention relates to a plurality of phononic devices and a method of manufacturing thereof. In one embodiment, highly sensitive superconducting cryogenic detectors integrate phononic crystals into their architecture. The phononic structures are designed to reduce the loss of athermal phonons, resulting in lower noise and higher sensitivity detectors. This fabrication process increases the qp generation recombination rate, thus, reducing the noise equivalent power (NEP) without sacrificing the scalability. A plurality of phononic devices, such as a kinetic inductance detector (KID), a transition edge sensor (TES) bolometer, and quarterwave backshort, can be manufactured according to the methods of the present invention.

Various fabrication methods are disclosed. In one such method, at least one structure is formed on a substrate which protrudes outwardly from a plane of the substrate. A beam is used to form a layer of material, at least part of which is in direct contact with a semiconductor structure on the substrate, the semiconductor structure comprising at least one nanowire. The beam has a non-zero angle of incidence relative to the normal of the plane of the substrate such that the beam is incident on one side of the protruding structure, thereby preventing a portion of the nanowire in a shadow region adjacent the other side of the protruding structure in the plane of the substrate from being covered with the material.

Various fabrication method are disclosed. In one such method, at least one structure is formed on a substrate which protrudes outwardly from a plane of the substrate. A beam is used to form a layer of material, at least part of which is in direct contact with a semiconductor structure on the substrate, the semiconductor structure comprising at least one nanowire. The beam has a non-zero angle of incidence relative to the normal of the plane of the substrate such that the beam is incident on one side of the protruding structure, thereby preventing a portion of the nanowire in a shadow region adjacent the other side of the protruding structure in the plane of the substrate from being covered with the material.