H10N60/10

Silicon quantum device structures defined by metallic structures

A silicon-based quantum device is provided. The device comprises: a first metallic structure (501); a second metallic structure (502) laterally separated from the first metallic structure; and an L-shaped elongate channel (520) defined by the separation between the first and second metallic structures; wherein the elongate channel has a vertex (505) connecting two elongate parts of the elongate channel. The device further comprises: a third metallic structure (518), mediator gate, positioned in the elongate channel; a fourth metallic structure (531) forming a first barrier gate, arranged at a first end of the third metallic structure; and a fifth metallic structure (532) forming a second barrier gate arranged at a second end of the third metallic structure. The first, second, third, fourth and fifth metallic structures are configured for connection to first, second, third, fourth and fifth electric potentials respectively. The first, second, fourth and fifth electric potentials are controllable to define an electrical potential well to confine quantum charge carriers in an elongate quantum dot beneath the elongate channel. The fourth and fifth electric potentials and the position of the fourth and fifth metallic structures define first and second ends of the elongate channel respectively. The width of the electrical potential well is defined by the position of the first and second metallic structures and their corresponding electric potentials; and the length of the electrical potential well is defined by the position of the fourth and fifth metallic structures and their corresponding electric potentials. The third electric potential is controllable to adjust quantum charge carrier energy levels in the electrical potential well.

QUANTUM PROCESSING SYSTEMS AND METHODS

A quantum processing element is disclosed. The element includes a semiconductor substrate, a dielectric material forming an interface with the semiconductor substrate, and a donor molecule embedded in the semiconductor. The donor molecule includes a plurality of dopant dots embedded in the semiconductor, each dopant dot includes one or more dopant atoms, and one or more electrons/holes confined to the dopant dots. A distance between the dopant dots is between 3 and 9 nanometres.

Fabricating a qubit coupling device
11751490 · 2023-09-05 · ·

A qubit coupling device includes: a dielectric substrate including a trench; a first superconductor layer on a surface of the dielectric substrate where an edge of the first superconductor layer extends along a first direction and at least a portion of the superconductor layer is in contact with the surface of the dielectric substrate, and where the superconductor layer is formed from a superconductor material exhibiting superconductor properties at or below a corresponding critical temperature; a length of the trench within the dielectric substrate is adjacent to and extends along an edge of the first superconductor layer in the first direction, and where the electric permittivity of the trench is less than the electric permittivity of the dielectric substrate.

METHODS FOR QUBIT READOUT

A method for readout of a singlet-triplet qubit in a donor based quantum processing element is disclosed. The method includes: initialising the singlet-triplet qubit in a ground state |Gcustom-character; performing a shelving readout; using a final measured charge configuration of the singlet-triplet qubit to determine information about a current Zeeman energy difference; and using the information about the current Zeeman energy difference to adjust mapping of the shelving readout.

Scalable designs for topological quantum computation

Apparatus, methods, and systems are disclosed for robust scalable topological quantum computing. Quantum dots are fabricated as van der Waals heterostructures, supporting localized topological phases and non-Abelian anyons (quasiparticles). Large bandgaps provide noise immunity. Three-dot structures include an intermediate quantum dot between two computational quantum dots. With the intermediate quantum dot in an OFF state, quasiparticles at the computational quantum dots can be isolated, with long lifetimes. Alternatively, the intermediate quantum dot can be controlled to decrease the quasiparticle tunneling barrier, enabling fast computing operations. A computationally universal suite of operations includes quasiparticle initialization, braiding, fusion, and readout of fused quasiparticle states, with, optionally, transport or tunable interactions—all topologically protected. Robust qubits can be operated without error correction. Quasilinear arrays of quantum dots or qubits can be scaled arbitrarily, up to resource limits, and large-scale topological quantum computers can be realized. Extensive two-dimensional arrays can also be used.

Thermalization arrangement at cryogenic temperatures

An inventive embodiment comprises a thermalization arrangement at cryogenic temperatures. The arrangement comprises a dielectric substrate (2) layer on which substrate a device/s or component/s (1) are positionable. A heat sink component (4) is attached on another side of the substrate. The arrangement further comprises a conductive layer (5) between the substrate layer (2) and the heat sink component (4). A joint between the substrate layer (2) and the conductive layer (5) has minimal thermal boundary resistance. Another joint between the conductive layer (5) and the cooling heat sink layer (4) is electrically conductive.

Thermalization arrangement at cryogenic temperatures

An inventive embodiment comprises a thermalization arrangement at cryogenic temperatures. The arrangement comprises a dielectric substrate (2) layer on which substrate a device/s or component/s (1) are positionable. A heat sink component (4) is attached on another side of the substrate. The arrangement further comprises a conductive layer (5) between the substrate layer (2) and the heat sink component (4). A joint between the substrate layer (2) and the conductive layer (5) has minimal thermal boundary resistance. Another joint between the conductive layer (5) and the cooling heat sink layer (4) is electrically conductive.

Superconducting electromagnetic wave sensor

An electromagnetic sensor for use in a variety of applications requiring extremely high sensitivity, such as measuring power and characteristics of incident electromagnetic radiation includes a superconducting layer that carries an exchange field for providing a spin splitting effect of charge carriers in the superconducting layer, a metal electrode, and an insulating layer arranged between the superconducting layer and metal electrode to form a spin filter junction therebetween. The electromagnetic sensor provides an antenna including a wave collecting element, in contact with the superconducting layer to convey thereinto external electromagnetic waves that are generated by an external source. An electric measurement device provides an output signal responsive to the amplitude and frequency of the external electromagnetic waves, and contacts the metal electrode to measure an electric current or voltage caused by the spin splitted charge carrier flow from the superconducting layer through the spin filter junction into the metal electrode.

Superconducting electromagnetic wave sensor

An electromagnetic sensor for use in a variety of applications requiring extremely high sensitivity, such as measuring power and characteristics of incident electromagnetic radiation includes a superconducting layer that carries an exchange field for providing a spin splitting effect of charge carriers in the superconducting layer, a metal electrode, and an insulating layer arranged between the superconducting layer and metal electrode to form a spin filter junction therebetween. The electromagnetic sensor provides an antenna including a wave collecting element, in contact with the superconducting layer to convey thereinto external electromagnetic waves that are generated by an external source. An electric measurement device provides an output signal responsive to the amplitude and frequency of the external electromagnetic waves, and contacts the metal electrode to measure an electric current or voltage caused by the spin splitted charge carrier flow from the superconducting layer through the spin filter junction into the metal electrode.

Constructing and programming quantum hardware for robust quantum annealing processes
11809963 · 2023-11-07 · ·

Among other things, an apparatus comprises quantum units; and couplers among the quantum units. Each coupler is configured to couple a pair of quantum units according to a quantum Hamiltonian characterizing the quantum units and the couplers. The quantum Hamiltonian includes quantum annealer Hamiltonian and a quantum governor Hamiltonian. The quantum annealer Hamiltonian includes information bearing degrees of freedom. The quantum governor Hamiltonian includes non-information bearing degrees of freedom that are engineered to steer the dissipative dynamics of information bearing degrees of freedom.