Patent classifications
H10N60/10
METHOD OF PATTERNING A LAYER OF SUPERCONDUCTOR MATERIAL
A method of patterning a layer of superconductor material comprises: forming a mask over the layer of superconductor material, the mask having at least one opening; depositing a layer of anodizable metal in the at least one opening, over a portion of the layer of superconductor material; removing the mask; and performing anodic oxidation, whereby the layer of anodizable metal protects the portion of the layer of the superconductor material from the anodic oxidation. The superconductor material is aluminium. The method allows for patterning of the superconductor material without the use of a chemical etch. This may in turn allow for improvements in resolution, and/or may avoid damage to further components or interfaces between components which may be present during the patterning. Also provided are the use of a titanium layer to protect an aluminium layer from anodic oxidation, and a semiconductor-superconductor hybrid device obtainable by the method.
METHOD OF PATTERNING A LAYER OF SUPERCONDUCTOR MATERIAL
A method of patterning a layer of superconductor material comprises: forming a mask over the layer of superconductor material, the mask having at least one opening; depositing a layer of anodizable metal in the at least one opening, over a portion of the layer of superconductor material; removing the mask; and performing anodic oxidation, whereby the layer of anodizable metal protects the portion of the layer of the superconductor material from the anodic oxidation. The superconductor material is aluminium. The method allows for patterning of the superconductor material without the use of a chemical etch. This may in turn allow for improvements in resolution, and/or may avoid damage to further components or interfaces between components which may be present during the patterning. Also provided are the use of a titanium layer to protect an aluminium layer from anodic oxidation, and a semiconductor-superconductor hybrid device obtainable by the method.
Superconductor-based transistor
The various embodiments described herein include methods, devices, and systems for fabricating and operating transistors. In one aspect, a transistor includes: (1) a semiconducting component configured to operate in an on state at temperatures above a semiconducting threshold temperature; and (2) a superconducting component configured to operate in a superconducting state while: (a) a temperature of the superconducting component is below a superconducting threshold temperature; and (b) a first current supplied to the superconducting component is below a current threshold; where: (i) the semiconducting component is located adjacent to the superconducting component; and (ii) in response to a first input voltage, the semiconducting component is configured to generate an electromagnetic field sufficient to lower the current threshold such that the first current exceeds the lowered current threshold, thereby transitioning the superconducting component to a non-superconducting state.
Reprogrammable quantum processor architecture
A novel and useful quantum computing machine includes classic computing and quantum computing cores. A programmable pattern generator executes instructions that control the quantum core. A pulse generator generates the control signals input to the quantum core to perform quantum operations. A partial readout of the quantum state is re-injected into the quantum core to extend decoherence time. Access gates control movement of quantum particles in the quantum core. Errors are corrected from the readout before being re-injected into the quantum core. Internal and external calibration loops calculate error syndromes and calibrate control pulses input to the quantum core. Control of the quantum core is provided from an external support unit via the pattern generator or retrieved from classic memory where sequences of commands are stored in memory. A cryostat unit functions to cool the quantum computing core to approximately 4 Kelvin.
GRAPHENE/DOPED 2D LAYERED MATERIAL VAN DER WAALS HETEROJUNCTION SUPERCONDUCTING COMPOSITE STRUCTURE, SUPERCONDUCTING DEVICE, AND MANUFACTURING METHOD THEREFOR
A graphene/doped 2D layered material Van der Waals heterojunction superconducting composite structure, a superconducting device and a manufacturing method therefor, which relate to the technical field of superconducting materials. Said structure includes: a (2n+1)-layered structure formed by graphene layers and doped 2D layered materials which are alternately provided. An outer layer of the layered structure is the graphene layer, n is an integer between 1 to 50, a superconducting region is formed by a region in which the graphene perpendicularly overlaps the doped 2D layered material, and the graphene layers and the doped two-dimensional layered materials are self-assembled into one piece by means of a Van der Waals force.
FABRICATION METHOD FOR SEMICONDUCTOR NANOWIRES COUPLED TO A SUPERCONDUCTOR
There is provided a method for fabricating a device. On a top surface of a substrate, a first layer of a first deposition material is formed. The first layer of the first deposition material is patterned to create a seed pattern of remaining first deposition material. Homoepitaxy is used to grow a second layer of the first deposition material on the seed pattern.
OSCILLATION APPARATUS, QUANTUM COMPUTER, AND CONTROL METHOD
An oscillation apparatus includes: an oscillator including a resonator and a magnetic-field generating unit, the resonator including a loop circuit and a capacitor, the loop circuit including a first superconducting line, a first Josephson junction, a second superconducting line, and a second Josephson junction connected in a ring shape, the magnetic-field generating unit being configured to apply a magnetic field to the loop circuit, and the oscillator being configured to perform parametric oscillation; a read-out unit for reading out an internal state of the oscillator; and a filter configured to restrict transmission of a signal in a predetermined frequency band. A circuit in which the capacitor and the loop circuit are connected in a ring shape is connected to the read-out unit through the filter.
OSCILLATION APPARATUS, QUANTUM COMPUTER, AND CONTROL METHOD
An oscillation apparatus includes: an oscillator including a resonator and a magnetic-field generation unit, the resonator including a loop circuit and a capacitor, the loop circuit including a first superconducting line, a first Josephson junction, a second superconducting line, and a second Josephson junction connected in a ring shape, the magnetic-field generation unit being configured to apply a magnetic field to the loop circuit, and the oscillator being configured to perform parametric oscillation; a read-out unit for reading out an internal state of the oscillator; and a circuit component in which a coupling strength between the oscillator and the read-out unit is variable. The oscillator is connected to the read-out unit through the circuit component.
RESONATOR, OSCILLATOR, AND QUANTUM COMPUTER
A resonator, an oscillator, and a quantum computer in which both moderate nonlinearity and a low loss are achieved, and the area occupied by the circuit can be reduced are provided. A resonator (100) includes at least one loop circuit (110) in which a first superconducting line (101), a first Josephson junction (103), a second superconducting line (102), and a second Josephson junction (104) are connected in a ring shape, at least one third Josephson junction (130) provided separately from the Josephson junction included in the loop circuit (110), and a capacitor (120), in which the loop circuit (110), the third Josephson junction (130), and the capacitor (120) are connected in a ring shape.
Semiconductor and ferromagnetic insulator heterostructure
A first aspect provides a topological quantum computing device comprising a network of semiconductor-superconductor nanowires, each nanowire comprising a length of semiconductor formed over a substrate and a coating of superconductor formed over at least part of the semiconductor; wherein at least some of the nanowires further comprise a coating of ferromagnetic insulator disposed over at least part of the semiconductor. A second aspect provides a method of fabricating a quantum or spintronic device comprising a heterostructure of semiconductor and ferromagnetic insulator, by: forming a portion of the semiconductor over a substrate in a first vacuum chamber, and growing a coating of the ferromagnetic insulator on the semiconductor by epitaxy in a second vacuum chamber connected to the first vacuum chamber by a vacuum tunnel, wherein the semiconductor comprises InAs and the ferromagnetic insulator comprises EuS.