A fabrication stack comprises at least one Josephson junction, at least one capacitor, and one or more high kinetic inductance wires that comprise NbTiN. The one or more high kinetic inductance wires are configured to electrically couple the at least one Josephson junction to the at least one capacitor to form a superconducting circuit that facilitates switching a state of the Josephson junction via a single flux quantum (SFQ) pulse.

A superconducting circuit comprises a resonator and a Josephson junction. The resonator comprises an inductor and a capacitor. The inductor comprises a first terminal and a second terminal. The second terminal of the inductor is electrically coupled to a first terminal of the capacitor. A second terminal of the capacitor is electrically coupled to a first terminal of the Josephson junction. The terminal shared by the inductor and the capacitor is configured to be electrically coupled to an alternating current (AC) voltage source having a particular frequency and particular phase. The inductance of the inductor and the capacitance of the capacitor are selected to cause the resonator to resonate at a frequency and a phase that substantially match the particular frequency and the particular phase, respectively, of the AC voltage source to facilitate switching a state of the Josephson junction via a single flux quantum (SFQ) pulse.

A vertical Josephson Junction (JJ) qubit device that is fabricated from crystalline silicon material is provided. The JJ device has a substrate of epitaxial silicon, a lower superconducting electrode that is a superconducting region of the epitaxial silicon and an upper superconducting electrode of a metallic superconductor. The JJ device also has a junction layer. A section of the junction layer between the lower and upper superconducting electrodes forms a junction of the JJ device. Resonator and/or capacitor wiring of the JJ device is also fabricated using the metallic superconductor. The superconducting region is epitaxial silicon that is doped or implanted with boron or gallium. The substrate, the junction layer, and the implanted epitaxial silicon share a contiguous crystalline structure.

A Josephson Junction qubit device is provided. The device includes a substrate of silicon material. The device includes first and second electrodes of superconducting metal. The device may include a nanowire created by direct ion implantation on to the silicon material to connect the first and second electrodes. The device may include first and second superconducting regions created by direct ion implantation on to the silicon material, the first superconducting region connecting the first electrode and the second superconducting region connecting the second electrode, with a silicon channel formed by a gap between the first and second superconducting regions.

The present disclosure discloses a high-fidelity superconducting circuit structure, a superconducting quantum chip, and a superconducting quantum computer, which relate to the field of quantum computation. The specific implementation is as follows: computation qubits; a coupling device configured to be coupled with two computation qubits, respectively; a connecting component disposed between a computation qubit and the coupling device to couple the computation qubit with the coupling device, so as to implement a target quantum gate based on the coupling device and the computation qubit.

A system for connecting superconducting tapes in a superconducting fault current limiter (SCFCL) system is disclosed. The novel connector system allows two superconducting tapes to be installed in a single opening in a connector stack. This reduced the height of the connector stack by nearly 50%, making the SCFCL system more efficient and smaller in volume. In one embodiment, each connector has a recessed portion on both the top and bottom surfaces, such that when stacked on another connector, the recessed portions align, forming a larger opening. In another embodiment, the connector has a single recessed portion that can accommodate two superconducting tapes. The superconducting tapes may be disposed in a protective sleeve.

The invention provides a spin qubit-type semiconductor device capable of achieving both high-speed spin manipulation and high integration, and an integrated circuit for the spin qubit-type semiconductor device. The spin qubit-type semiconductor device includes a body comprised of at least one of a semiconductor layer itself formed with a quantum dot and a structural portion arranged around the semiconductor layer, a gate electrode arranged at a position on the semiconductor layer, which faces the quantum dot, at least one micro magnet wholly or partly embedded in the body so that a first position condition in which the micro magnet is at a position near the quantum dot, a second position condition in which the position of a lower end of the micro magnet is located below the gate electrode, and a third position condition in which when viewed from above the body, the micro magnet is arranged at a position having no rotational symmetry with the quantum dot as the center of rotation are satisfied, and a static magnetic field applying unit capable of applying a static magnetic field to the quantum dot and the micro magnet.

The invention provides a spin qubit-type semiconductor device capable of achieving both high-speed spin manipulation and high integration, and an integrated circuit for the spin qubit-type semiconductor device. The spin qubit-type semiconductor device includes a body comprised of at least one of a semiconductor layer itself formed with a quantum dot and a structural portion arranged around the semiconductor layer, a gate electrode arranged at a position on the semiconductor layer, which faces the quantum dot, at least one micro magnet wholly or partly embedded in the body so that a first position condition in which the micro magnet is at a position near the quantum dot, a second position condition in which the position of a lower end of the micro magnet is located below the gate electrode, and a third position condition in which when viewed from above the body, the micro magnet is arranged at a position having no rotational symmetry with the quantum dot as the center of rotation are satisfied, and a static magnetic field applying unit capable of applying a static magnetic field to the quantum dot and the micro magnet.

Techniques for forming respective groups of quantum circuit elements (QCEs) on respective crystalline surfaces of a crystalline dielectric (CD) layer are presented. Vias can be formed in the CD layer. Second QCEs can be formed on a second crystalline surface of the CD layer. A seal layer can be applied to the patterned second metallization layer that forms the second QCEs. A handle wafer can be bonded to the seal layer. The chip stack can be turned over to place a substrate at the top, and handle wafer at the bottom, of the chip stack. The substrate and a buried oxide layer can be removed to expose the first crystalline surface of the CD layer. First QCEs can be formed on the first crystalline surface of the CD layer. A portion of the first QCEs can be coupled or interconnected to a portion of the second QCEs.

A double Dolan Bridge structure includes two Dolan Bridges arranged side-by-side to form a Josephson Junction. Each Dolan Bridge includes a substrate, and a triple stack resist configuration including three layers of material arranged on the substrate. An asymmetrically arranged junction including at least three metallic layers is arranged on the substrate in a stack having no more than two of the least three metallic stacked on each other.