A multilayer component and a mathod for producing a multilayer component are disclosed. In an embodiment the multilayer component includes a ceramic main element being a varistor ceramic and at least one metal structure, wherein the metal structure is cosintered, and wherein the main element is doped with a material of the metal structure in such a way that a diffusion of the material from the metal structure into the main element during a sintering operation is reduced.

A chip ceramic semiconductor electronic component includes a ceramic body including a ceramic semiconductor, and a first surface and a second surface in contact with the first surface, the first outer electrode on the first surface of the ceramic body, and the second outer electrode covering the first outer electrode and extending onto the second surface of the ceramic body, in which an area of a first surface of the first outer electrode is less than about 0.17 mm.sup.2, and a hard particle made of a material harder than the first outer electrode is at the interface between the first and second outer electrodes.

A sintered body has a first end face and a second end face opposite to each other in a first direction and a first side face and a second side face opposite to each other in a second direction. A first end face electrode is disposed on the first end face except for end portions of the first end face in the second direction. A second end face electrode is disposed on the second end face except for end portions of the second end face in the second direction. A first side face electrode is disposed on the first side face except for end portions of the first side face in the first direction. A second side face electrode is disposed on the second side face except for end portions of the second side face in the first direction.

A multilayer varistor of the present disclosure includes a sintered body, a first internal electrode, a second internal electrode, a first external electrode, a second external electrode, and a high-resistance layer. The first internal electrode and the second internal electrode are disposed in the sintered body. The first external electrode is disposed on a surface of the sintered body and is electrically connected to the first internal electrode. The second external electrode is disposed on the surface of the sintered body and is electrically connected to the second internal electrode. The high-resistance layer covers at least part of the surface of the sintered body, and the high-resistance layer has a surface having a plurality of cracks.

A chip varistor includes an element body exhibiting varistor characteristics, internal electrodes containing a first electrically conductive material, and an intermediate conductor containing a second electrically conductive material. The intermediate conductor is separated from the internal electrodes in a direction in which the internal electrodes oppose each other, and is disposed between the internal electrodes. At least a part of the intermediate conductor overlaps the internal electrodes in the direction in which the internal electrodes oppose each other. The element body includes a low resistance region in which the second electrically conductive material is diffused. The low resistance region is located between the first and second internal electrodes in the direction in which the first and second internal electrodes oppose each other.

There is provided a resistor in which a first resistive part of a resistive element that electrically conducts between a pair of electrodes formed on either end of an insulating substrate has a meandering pattern meandering on the substrate surface and a swelling pattern that has a form in which a part of the meandering pattern swells out from the stroke width of the meandering pattern, a second resistive part that is electrically connected in series to the first resistive part is shorter than the entire length of the first resistive part, and has a wider width than the stroke width of the meandering pattern, and a trimming groove is formed in at least either the swelling pattern or the second resistive part. This can improve resistance accuracy and provide a high voltage resistor with high withstand voltage property.

An electrical component having a layered structure including first and second electrodes each having first and second electrode portions located in a plane and at least partially embedded in a dielectric body, each of the first and second electrode portions separated by a gap and substantially isolated by the dielectric, the first electrode substantially parallel to and at least partially overlapping the second electrode, wherein the first and second electrodes are electrically isolated and separated by the dielectric body.

An electrical component for embedding into a carrier comprises a ceramic main body, an electrically insulating passivation layer which is applied to the main body, and at least one inner electrode. In addition, the electrical component comprises an outer electrode which is connected to the inner electrode, wherein the outer electrode comprises a first electrode layer comprising a metal and a second electrode layer which is arranged on the latter and comprises copper.

An electronic component includes external electrodes formed on an external surface of a body to be electrically connected to internal electrodes, and containing metal particles and glass, wherein the metal particles include particles having a polyhedral shape.

A sintered body that includes semiconductor ceramic layers and an internal electrode which are alternately stacked on one another is prepared. A first external electrode is formed on a side surface of the sintered body such that the first external electrode is connected to the internal electrode. An insulating layer is formed on a surface of the sintered body by applying a glass coating over an entire of the sintered body having the formed first external electrode. The insulating layer is exposed from the first external electrode. A second external electrode is formed on the first external electrode. This method provides the produced multilayer electronic component with a stable electric connection between the internal electrodes and the external electrodes.