A single-ended inductor comprises a first partial coil wound in a first direction; and a second partial coil wound in a second direction and adjoined the first partial coil; wherein, the second direction is opposite to the first direction to reduce the coupling of single-ended inductors and peripheral lines and reduce signal interference.

An inductor device includes a first coil, a second coil and a toroidal coil. The first coil is partially overlapped with the second coil in a vertical direction. The toroidal coil is disposed outside the first coil and the second coil. The first coil is interlaced with the second coil at a first side and a second side of the inductor device.

A low-resistance thick-wire integrated inductor may be formed in an integrated circuit (IC) device. The integrated inductor may include an elongated inductor wire defined by a metal layer stack including an upper metal layer, middle metal layer, and lower metal layer. The lower metal layer may be formed in a top copper interconnect layer, the upper metal layer may be formed in an aluminum bond pad layer, and the middle metal layer may comprise a copper tub region formed between the aluminum upper layer and copper lower layer. The wide copper region defining the middle layer of the metal layer stack may be formed concurrently with copper vias of interconnect structures in the IC device, e.g., by filling respective openings using copper electrochemical plating or other bottom-up fill process. The elongated inductor wire may be shaped in a spiral or other symmetrical or non-symmetrical shape.

A coil component includes a support substrate disposed in the body, a coil portion disposed on the support substrate and comprising first, second, third and fourth coil layers spaced apart from each other, and a first external electrode and a second external electrode disposed to be spaced apart from each other on the body and connected to the first and fourth coil layers, respectively. Each of the second and third coil layers comprises a first metal layer, disposed on the support substrate, and a second metal layer disposed on the first metal layer to cover a side surface of the first metal layer and to be in contact with the support substrate. The second coil layer has a first bridge pattern exposed to a first side surface of two side surfaces, opposing each other, of the body. The third coil layer has a second bridge pattern exposed to a second side surface of the two side surfaces of the body.

A low-resistance thick-wire integrated inductor may be formed in an integrated circuit (IC) device. The integrated inductor may include an elongated inductor wire defined by a metal layer stack including an upper metal layer, middle metal layer, and lower metal layer. The lower metal layer may be formed in a top copper interconnect layer, the upper metal layer may be formed in an aluminum bond pad layer, and the middle metal layer may comprise a copper tub region formed between the aluminum upper layer and copper lower layer. The wide copper region defining the middle layer of the metal layer stack may be formed concurrently with copper vias of interconnect structures in the IC device, e.g., by filling respective openings using copper electrochemical plating or other bottom-up fill process. The elongated inductor wire may be shaped in a spiral or other symmetrical or non-symmetrical shape.

Disclosed herein is a coil component that includes first and second coil parts each spirally wound in a plurality of turns in directions opposite to each other. An innermost turn of the first coil part is radially divided into first and second conductor parts by a spiral slit, and at least an innermost turn of the second coil part is radially divided into third and fourth conductor parts by a spiral slit. The first conductor part is positioned radially inward of the second conductor part, and the third conductor part is positioned radially inward of the fourth conductor part. The inner peripheral end of the first conductor part is connected to the inner peripheral end of the fourth conductor part, and the inner peripheral end of the second conductor part is connected to the inner peripheral end of the third conductor part.

Embodiments of this application disclose an inductor device wiring architecture, including an inductor device and a plurality of dummy metals located under the inductor device. The plurality of dummy metals are arranged in a plurality of metal layers. Each of the plurality of metal layers corresponds to some of the plurality of dummy metals. Arrangement areas of dummy metals corresponding to at least two of the plurality of metal layers progressively increase in a direction away from the inductor device. In the inductor device wiring architecture, adverse effects on performance of the inductor device can be reduced, and a product yield can be increased. The embodiments of this application further disclose an integrated circuit and a communications device.

In an embodiment, an integrated circuit die includes a semiconductor substrate, patterned metal layers compiled over the semiconductor substrate, and a tapered multipath inductor formed in the patterned metal layers. The tapered multipath inductor includes, in turn, an inductor input terminal, an inductor output terminal, and N number of parallel inductor tracks electrically coupled between the inductor input terminal and the inductor output terminal. The parallel inductor tracks wind or wrap around an inductor centerline to define a plurality of multipath inductor windings including an innermost winding and an outermost winding. The parallel inductor tracks further vary in track width when progressing from the outermost winding to the innermost winding of the plurality of multipath inductor windings.

In an embodiment, an integrated circuit die includes a semiconductor substrate, patterned metal layers compiled over the semiconductor substrate, and a tapered multipath inductor formed in the patterned metal layers. The tapered multipath inductor includes, in turn, an inductor input terminal, an inductor output terminal, and N number of parallel inductor tracks electrically coupled between the inductor input terminal and the inductor output terminal. The parallel inductor tracks wind or wrap around an inductor centerline to define a plurality of multipath inductor windings including an innermost winding and an outermost winding. The parallel inductor tracks further vary in track width when progressing from the outermost winding to the innermost winding of the plurality of multipath inductor windings.

A system and method for providing and programming a programmable inductor is provided. The structure of the programmable inductor includes multiple turns, with programmable interconnects incorporated at various points around the turns to provide a desired isolation of the turns during programming. In an embodiment the programming may be controlled using the size of the vias, the number of vias, or the shapes of the interconnects.