Embodiments of this application disclose an inductor device wiring architecture, including an inductor device and a plurality of dummy metals located under the inductor device. The plurality of dummy metals are arranged in a plurality of metal layers. Each of the plurality of metal layers corresponds to some of the plurality of dummy metals. Arrangement areas of dummy metals corresponding to at least two of the plurality of metal layers progressively increase in a direction away from the inductor device. In the inductor device wiring architecture, adverse effects on performance of the inductor device can be reduced, and a product yield can be increased. The embodiments of this application further disclose an integrated circuit and a communications device.

A multi-voltage domain device includes a semiconductor layer including a first voltage domain, a second voltage domain, and an isolation region that electrically isolates the first voltage domain and the second voltage domain in a lateral direction. The isolation region includes at least one deep trench isolation barrier. A layer stack is arranged on the semiconductor layer and includes a stack insulator layer, a first coil arranged in the stack insulator layer, and a second coil arranged in the stack insulator layer and laterally separated from the first coil in the lateral direction. The first and second coils are magnetically coupled to each other in the lateral direction. The first coil includes terminals arranged vertically over the first region and are electrically coupled to the first voltage domain, and the second coil includes terminals arranged vertically over the second region and are electrically coupled to the second voltage domain.

The present invention discloses an inductive device having electromagnetic radiation shielding mechanism used to establish electromagnetic radiation shielding mechanism against an electronic device that includes an inductive unit and a first shielding structure. The first shielding structure forms a closed shape and is disposed next to a side of the inductive unit, wherein the first shielding structure is located between the inductive unit and the electronic device.

A coil component includes a body, a support substrate disposed within the body, a coil portion disposed on the support substrate and having first and second lead-out portions exposed to respective surfaces of the body, a noise removal portion disposed within the body and spaced apart from the coil portion, and including a pattern portion forming an open loop and having a slit between one end portion thereof and another end portion thereof spaced apart from each other. The noise removal portion also includes a third lead-out portion connected to the pattern portion and having one surface exposed to a side surface of the body. An insulating layer is disposed between the coil portion and the noise removal portion, and first to third external electrodes are disposed on respective surfaces of the body and connected to the first to third lead-out portions, respectively.

A module is provided with a substrate having a main surface, and each of one or more inductors that are disposed on the main surface of the substrate. A resin sealing portion seals the one or more inductors and covers the main surface of the substrate. A ground conductor is disposed on an outer peripheral side of the substrate with respect to entirety of the one or more inductors in a plan view. A plurality of linear conductors are disposed on the resin sealing portion. The plurality of linear conductors are disposed with gaps therebetween, such that the one or more inductors underlie at least one of the plurality of linear conductors in the plan view.

The present disclosure relates to, in part, an inductor structure that includes an etch stop layer arranged over an interconnect structure overlying a substrate. A magnetic structure includes a plurality of stacked layers is arranged over the etch stop layer. The magnetic structure includes a bottommost layer that is wider than a topmost layer. A first conductive wire and a second conductive wire extend in parallel over the magnetic structure. The magnetic structure is configured to modify magnetic fields generated by the first and second conductive wires. A pattern enhancement layer is arranged between the bottommost layer of the magnetic structure and the etch stop layer. The pattern enhancement layer has a first thickness, and the bottommost layer of the magnetic structure has a second thickness that is less than the first thickness.

A radio frequency chip, and a method and apparatus for designing a radio frequency chip, which relates to the technical field of integrated circuits, with a major object to reduce the possibility of generating a parasitic capacitance between an on-chip inductor and a substrate. Herein, the radio frequency chip includes a substrate, an on-chip inductor, and an isolator between the substrate and the on-chip inductor, wherein the isolator is structured not to generate a loop induced current in a magnetic field of the on-chip inductor, and the isolator is configured to prevent a parasitic capacitance from being generated between the substrate and the on-chip inductor.

An inductor is disclosed, including a first wire, a non-conductive material, and a shell. The non-conductive material may cover the first wire, with a portion of each end of the first wire uncovered. The shell may include a top portion and a bottom portion and include at least one magnetized layer and at least one gap between the first portion and the second portion. The shell may also surround a portion of the non-conductive material.

A vertical inductor structure includes a first laminate substrate forming a first portion of the vertical inductor structure and a second laminate substrate forming a second portion. Each laminate substrate includes a plurality of first traces embedded in a layer of the laminate substrate, a plurality of first vertical columns, and a plurality of second vertical columns. Each first vertical columns is coupled to a first end of a respective first trace, and each second vertical column is coupled to a second end of a respective first trace. The second laminate substrate is mounted on the first laminate substrate such that each first vertical column of the first laminate substrate is coupled to a respective first vertical column of the second laminate substrate, and each second vertical column of the first laminate substrate is coupled to a respective second vertical column of the second laminate substrate.

The present disclosure relates to, in part, an inductor structure that includes an etch stop layer arranged over an interconnect structure overlying a substrate. A magnetic structure includes a plurality of stacked layers is arranged over the etch stop layer. The magnetic structure includes a bottommost layer that is wider than a topmost layer. A first conductive wire and a second conductive wire extend in parallel over the magnetic structure. The magnetic structure is configured to modify magnetic fields generated by the first and second conductive wires. A pattern enhancement layer is arranged between the bottommost layer of the magnetic structure and the etch stop layer. The pattern enhancement layer has a first thickness, and the bottommost layer of the magnetic structure has a second thickness that is less than the first thickness.