H01F2017/0086

LAYERED PROCESS-CONSTRUCTED DOUBLE-WINDING EMBEDDED SOLENOID INDUCTOR
20210287841 · 2021-09-16 ·

A method for constructing a solenoid inductor includes positioning an inner winding substantially around a magnetic core, positioning an outer winding substantially around the inner winding, and using a layered process to perform said positioning the inner and outer windings. The layered process includes processing a first conducting layer as a bottom layer of the outer winding, above processing a first dielectric layer, above processing a second conducting layer as a bottom layer of the inner winding, above processing a second dielectric layer, above processing a magnetic core layer, above processing a third dielectric layer, above processing a third conducting layer as a top layer of the inner winding, above processing a fourth dielectric layer, above processing a fourth conducting layer as a top layer of the outer winding, above processing a fifth dielectric layer, and the inner and outer windings are electrically connected.

SEMICONDUCTOR WITH CHIP-EXTERNAL MAGNETIC CORES
20210183560 · 2021-06-17 ·

The structure includes a semiconductor chip connected to a substrate via one or more solder balls. The semiconductor chip includes one or more on-chip metal winding. The structure includes a first ferromagnetic core. The first ferromagnetic core is located below the semiconductor chip and above the substrate. The structure includes a second ferromagnetic core. The second ferromagnetic core is located above the semiconductor chip. The first ferromagnetic core and the second ferromagnetic core create a magnetic loop.

INTEGRATED ELECTRONIC DEVICE COMPRISING A COIL AND METHOD FOR MANUFACTURING SUCH A DEVICE
20210159012 · 2021-05-27 ·

An electronic device includes a substrate; a porous semiconductor material layer arranged on the substrate; a first high magnetic permeability material arranged inside the pores of a first portion of the porous semiconductor layer, the first portion of the porous semiconductor material layer impregnated with the first high magnetic permeability material forming a first magnetic layer separated from the substrate by a second portion of the porous semiconductor material layer; and a coil arranged on the first magnetic layer.

COAXIAL MAGNETIC INDUCTORS WITH PRE-FABRICATED FERRITE CORES
20210104475 · 2021-04-08 ·

Embodiments include an inductor, a method to form the inductor, and a semiconductor package. An inductor includes a plurality of plated-through-hole (PTH) vias in a substrate layer, and a plurality of magnetic interconnects with a plurality of openings in the substrate layer. The openings of the magnetic interconnects surround the PTH vias. The inductor also includes an insulating layer in the substrate layer, a first conductive layer over the PTH vias, magnetic interconnects, and insulating layer, and a second conductive layer below the PTH vias, magnetic interconnects, and insulating layer. The insulating layer surrounds the PTH vias and magnetic interconnects. The magnetic interconnects may have a thickness substantially equal to a thickness of the PTH vias. The magnetic interconnects may be shaped as hollow cylindrical magnetic cores with magnetic materials. The magnetic materials may include ferroelectric, conductive, or epoxy materials. The hollow cylindrical magnetic cores may be ferroelectric cores.

Integrated inductor

An integrated inductor includes a first coil and a second coil. The first coil has at least one first turn disposed in a first area and at least one second turn disposed in a second area, a number of the at least one first turn is different from a number of the at least one second turn. The second coil has at least one third turn disposed in the first area and at least one fourth turn disposed in the second area, a number of the at least one third turn is different from a number of the at least one fourth turn. The number of the at least one first turn is different from the number of the at least one third turn, and the number of the at least one second turn is different from the number of the at least one fourth turn.

High-Q integrated inductor and method thereof

A device having a substrate, a dielectric slab attached upon the substrate, a coil including a plurality of metal segments laid out on a first metal layer secured by the dielectric slab, the coil being substantially laterally symmetrical with respect to a central line from a top view perspective, and a shield laid out on a second metal layer secured by the dielectric slab and configured in a tree topology. The shield is substantially laterally symmetrical with respect to the central line from the top view perspective, the tree topology including a plurality of clusters of branches, wherein each of said plurality of clusters of branches is associated with a respective metal segment of the coil and includes a primary branch and at least one set of secondary branches that are branched from the primary branch, parallel to one another, and oriented at a substantially forty-five-degree angle with respect to the respective metal segment from the top view perspective.

A POWER CONVERTER EMBODIED IN A SEMICONDUCTOR SUBSTRATE MEMBER
20210050408 · 2021-02-18 ·

A power converter is embodied on a semiconductor substrate member and has a first region with a passive electrical component with a first electrically conductive layer pattern of an electrically conductive material and a second electrically conductive layer pattern of an electrically conductive material deposited on respective sides of the semiconductor substrate member. A trench or through-hole is formed (by etching) in the substrate within the first region, and the electrically conductive material is deposited at least on a bottom portion of the trench or on a sidewall of the through-hole and electrically connected to one or both of the first conductive layer pattern and the second conductive layer pattern. A second region has an active semiconductor component integrated with the semiconductor substrate by being fabricated by a semiconductor fabrication process. There is also provided a power supply, such as a DC-DC converter, embedded the semiconductor substrate member.

INDUCTORS WITH THROUGH-SUBSTRATE VIA CORES
20210082818 · 2021-03-18 ·

A semiconductor device comprising a substrate is provided. The device further comprises a through-substrate via (TSV) extending into the substrate, and a substantially helical conductor disposed around the TSV. The substantially helical conductor can be configured to generate a magnetic field in the TSV in response to a current passing through the helical conductor. More than one TSV can be included, and/or more than one substantially helical conductor can be provided.

ON-CHIP MULTI-LAYER TRANSFORMER AND INDUCTOR
20210065963 · 2021-03-04 ·

A stacked transformer or inductor apparatus including a first layer with a first layer wire element extending around a center axis and a second layer with a second layer wire element. The second layer element includes side by side first and second wire components in parallel spaced relation extending around the center axis and the first wire component is connected to the first layer wire element to form a primary turn winding. A third layer includes a third layer wire element extending around the center axis and connected to the second wire component of the second layer wire element to form a secondary turn winding partially overlapping with the primary turn winding.

SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
20210035905 · 2021-02-04 ·

The semiconductor structure includes a first die, a second die, a connecting portion, and a through-substrate via. The first die includes a first dielectric layer and a first helical conductor embedded therein. The second die includes a second dielectric layer and a second helical conductor embedded therein, wherein the second dielectric layer is bonded with the first dielectric layer, thereby forming an interface. The connecting portion extends from the first dielectric layer through the interface to the second dielectric layer and interconnects the first helical conductor with the second helical conductor. The through-substrate via extends from the first die to the second die through the interface, wherein the through-substrate via is surrounded by the first and the second helical conductors.