A multi-die module includes a first die with a first electronic device and a second die with a second electronic device. The multi-die module also includes a contactless coupler configured to convey signals between the first electronic device and the second electronic device. The multi-die module also includes a coupling loss reduction structure.

Embodiments of the disclosure relate to apparatuses for enhanced thermal management of an inductor assembly using functionally-graded thermal vias for heat flow control in the windings of the inductor. In one embodiment, a PCB for an inductor assembly includes a top surface and a bottom surface. Two or more electrically-conductive layers are embedded within the PCB and stacked vertically between the top surface and the bottom surface. The two or more electrically-conductive layers are electrically connected to form an inductor winding. A plurality of thermal vias thermally connects each of the two or more electrically-conductive layers to a cold plate thermally connected to the bottom surface. A number of thermal vias thermally connecting each electrically-conductive layer to the cold plate is directly proportional to a predetermined rate of heat dissipation from the electrically-conductive layer.

A voltage regulator module with a vertical layout structure includes a circuit board assembly, an electroplated region and a magnetic core assembly. The circuit board assembly includes a printed circuit board and at least one switch element. The printed circuit board includes a first surface, a second surface, a plurality of lateral surfaces, an accommodation space and a conductive structure. The switch element is disposed on the first surface. A conduction part is formed on the second surface. The conductive structure is perpendicular to the printed circuit board and disposed within the accommodation space. The electroplated region is formed on the corresponding lateral surface, arranged between the conduction part and the first surface, and electrically connected with the conduction part and the switch element. The magnetic core assembly is accommodated within the accommodation space. Consequently, an inductor is defined by the conductive structure and the magnetic core assembly collaboratively.

Disclosed is a tunable inductor device having a substrate, a planar spiral conductor having a plurality of spaced-apart turns disposed over the substrate, and a phase change switch (PCS) having a patch of a phase change material (PCM) disposed over the substrate between and in contact with a pair of adjacent segments of the plurality of spaced-apart turns, wherein the patch of the PCM is electrically insulating in an amorphous state and electrically conductive in a crystalline state. The PCS further includes a thermal element disposed adjacent to the patch of PCM, wherein the thermal element is configured to maintain the patch of the PCM to within a first temperature range until the patch of the PCM converts to the amorphous state and maintain the patch of the PCM within a second temperature range until the first patch of PCM converts to the crystalline state.

The subject matter described herein provides systems and techniques for the integration of TLVR technology in a vertical power VR module. A multiple-secondary TLVR topology using a controlled leakage inductance in the place of a separate compensation inductor, Lc, may be employed for the vertical power VR module. In addition, the capacitance inside the device to which the TLVR based vertical power VR module supplies power, rather than an output capacitance board, may be used in order to allow the module to be a single layer. Example structures that may include one or more primary windings and/or one or more secondary windings for each of possibly multiple linked phases of the TLVR based module are provided. The windings may be formed using traditional copper windings or printed circuit board (PCB) copper trace winding.

Methods and apparatus for inductor and transformer semiconductor devices using hybrid bonding technology are disclosed. An example semiconductor device includes a first standoff substrate; a second standoff substrate adjacent the first standoff substrate; and a conductive layer adjacent at least one of the first standoff substrate or the second standoff substrate.

A coil component includes: a body; a coil unit including lead-out ends and coils, and embedded in the body; and a core penetrating through the coil unit in a first direction, wherein a cross-section of each of the coils perpendicular to a direction in which the coil is wound has a plurality of round portions disposed on a side facing the core.

An electronic device includes a multilevel lamination structure having a core layer, dielectric layers and conductive features formed in metal layers on or between respective ones or pairs of the dielectric layers. The core layer and the dielectric layers extend in respective planes of orthogonal first and second directions and are stacked along an orthogonal third direction. The conductive features include a first patterned conductive feature having multiple conductive turns in each of a first pair of the metal layers to form a first winding having a first turn and a final turn adjacent to one another in the same metal layer of the first pair, and a second patterned conductive feature having multiple conductive turns in a second pair of the metal layers to form a second winding having a first turn and a final turn.

In a described example, an integrated circuit includes: a semiconductor substrate having a first surface and an opposite second surface; at least one dielectric layer overlying the first surface of the semiconductor substrate; at least one inductor coil in the at least one dielectric layer with a plurality of coil windings separated by coil spaces, the at least one inductor coil lying in a plane oriented in a first direction parallel to the first surface of the semiconductor substrate, the at least one inductor coil electrically isolated from the semiconductor substrate by a portion of the at least one dielectric layer; and trenches extending into the semiconductor substrate in a second direction at an angle with respect to the first direction, the trenches underlying the inductor coil and filled with dielectric replacement material.

A microelectronics package comprising a package core and an inductor over the package core. The inductor comprises a dielectric over the package core. The dielectric comprises a curved surface opposite the package core. At least one conductive trace is adjacent to the package core. The at least one conductive trace is at least partially embedded within the dielectric and extends over the package core. A magnetic core cladding is over the dielectric layer and at least partially surrounding the conductive trace.