A semiconductor device includes a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate, a first ultra low-k (ULK) dielectric layer on the first MTJ and the second MTJ, a passivation layer on the first ULK dielectric layer, and a second ULK dielectric layer on the passivation layer. Preferably, the first ULK dielectric layer includes a first thickness, the passivation layer between the first MTJ and the second MTJ includes a second thickness, the passivation layer on top of the first MTJ includes a third thickness, and the second thickness is greater than the third thickness

A semiconductor device includes a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate, a first ultra low-k (ULK) dielectric layer on the first MTJ and the second MTJ, a passivation layer on the first ULK dielectric layer, and a second ULK dielectric layer on the passivation layer. Preferably, the first ULK dielectric layer includes a first thickness, the passivation layer between the first MTJ and the second MTJ includes a second thickness, the passivation layer on top of the first MTJ includes a third thickness, and the second thickness is greater than the third thickness

A magnetic property measuring system includes a stage configured to hold a sample and a magnetic structure disposed over the stage. The stage includes a body part, a magnetic part adjacent the body part, and a plurality of holes defined in the body part. The magnetic part of the stage and the magnetic structure are configured to apply a magnetic field, which is perpendicular to one surface of the sample, to the sample. The stage is configured to move horizontally in an x-direction and a y-direction which are parallel to the one surface of the sample.

A magnetic property measuring system includes a stage configured to hold a sample and a magnetic structure disposed over the stage. The stage includes a body part, a magnetic part adjacent the body part, and a plurality of holes defined in the body part. The magnetic part of the stage and the magnetic structure are configured to apply a magnetic field, which is perpendicular to one surface of the sample, to the sample. The stage is configured to move horizontally in an x-direction and a y-direction which are parallel to the one surface of the sample.

A magnetic light-emitting structure and fabrication method for manufacturing a magnetic light-emitting element are provided. The fabrication method comprises providing a magnetic metal composite substrate, wherein a second metal layer is respectively disposed on an upper and lower surface of a first metal layer; forming a connecting metal layer, an epitaxial layer and a plurality of electrode unit on top; and performing a complex process, which removes the second metal layer on the lower surface of the first metal layer and part of the first metal layer and performs cutting according to the number of the electrode unit, so as to form a plurality of epitaxial die. Each epitaxial die corresponds to an electrode unit to form a magnetic light-emitting element. The proposed method improves soft magnetic properties of an original substrate and enables dies to reverse spontaneously, thereby used perfectly for industrial mass transfer technology.

The present disclosure provides a semiconductor structure. The semiconductor structure includes an N.sup.th metal layer in a memory region and a periphery region, the periphery region spanning a wider area than the memory region, a plurality of magnetic tunneling junctions (MTJs) over the N.sup.th metal layer, the plurality of MTJs having at least one of mixed pitches and mixed sizes, a top electrode via over each of the plurality of MTJs; and an (N+M).sup.th metal layer over the plurality of MTJs. A method for manufacturing the semiconductor structure is also disclosed.

The present disclosure provides a semiconductor structure. The semiconductor structure includes an N.sup.th metal layer in a memory region and a periphery region, the periphery region spanning a wider area than the memory region, a plurality of magnetic tunneling junctions (MTJs) over the N.sup.th metal layer, the plurality of MTJs having at least one of mixed pitches and mixed sizes, a top electrode via over each of the plurality of MTJs; and an (N+M).sup.th metal layer over the plurality of MTJs. A method for manufacturing the semiconductor structure is also disclosed.

A first conductive layer is patterned and trimmed to form a sub 30 nm conductive via on a first bottom electrode. The conductive via is encapsulated with a first dielectric layer and planarized to expose a top surface of the conductive via. A second conductive layer is deposited over the first dielectric layer and the conductive via. The second conductive layer is patterned to form a sub 60 nm second conductive layer wherein the conductive via and second conductive layer together form a T-shaped second bottom electrode. MTJ stacks are deposited on the T-shaped second bottom electrode and on the first bottom electrode wherein the MTJ stacks are discontinuous. A second dielectric layer is deposited over the MTJ stacks and planarized to expose a top surface of the MTJ stack on the T-shaped second bottom electrode. A top electrode contacts the MTJ stack on the T-shaped second bottom electrode plug.

A first conductive layer is patterned and trimmed to form a sub 30 nm conductive via on a first bottom electrode. The conductive via is encapsulated with a first dielectric layer and planarized to expose a top surface of the conductive via. A second conductive layer is deposited over the first dielectric layer and the conductive via. The second conductive layer is patterned to form a sub 60 nm second conductive layer wherein the conductive via and second conductive layer together form a T-shaped second bottom electrode. MTJ stacks are deposited on the T-shaped second bottom electrode and on the first bottom electrode wherein the MTJ stacks are discontinuous. A second dielectric layer is deposited over the MTJ stacks and planarized to expose a top surface of the MTJ stack on the T-shaped second bottom electrode. A top electrode contacts the MTJ stack on the T-shaped second bottom electrode plug.

A method for etching a magnetic tunneling junction (MTJ) structure is described. A MTJ stack is deposited on a bottom electrode wherein the MTJ stack comprises at least a pinned layer, a barrier layer on the pinned layer, and a free layer on the barrier layer, A top electrode layer is deposited on the MTJ stack. A hard mask is deposited on the top electrode layer. The top electrode layer and hard mask are etched. Thereafter, the MTJ stack not covered by the hard mask is etched, stopping at or within the pinned layer. Thereafter, an encapsulation layer is deposited over the partially etched MTJ stack and etched away on horizontal surfaces leaving a self-aligned hard mask on sidewalls of the partially etched MTJ stack. Finally, the remaining MTJ stack not covered by hard mask and self-aligned hard mask is etched to complete the MTJ structure.