The present disclosure provides an ion implantation method and an ion implanter for realizing the ion implantation method. The above-mentioned ion implantation method comprises: providing a spot-shaped ion beam current implanted into the wafer; controlling the wafer to move back and forth in a first direction; controlling the spot-shaped ion beam current to scan back and forth in a second direction perpendicular to the first direction; and adjusting the scanning width of the spot-shaped ion beam current in the second direction according to the width of the portion of the wafer currently scanned by the spot-shaped ion beam current in the second direction. According to the ion implantation method provided by the present disclosure, the scanning path of the ion beam current is adjusted by changing the scanning width of the ion beam current, so that the beam scanning area is attached to the wafer, which greatly reduces the waste of the ion beam current, improves the effective ion beam current and increases productivity without increasing actual ion beam current.

Described herein are a system and method of preparing integrated circuits (ICs) so that the ICs remain electrically active and can have their active circuitry probed for diagnostic and characterization purposes using charged particle beams. The system employs an infrared camera capable of looking through the silicon substrate of the ICs to image electrical circuits therein, a focused ion beam system that can both image the IC and selectively remove substrate material from the IC, a scanning electron microscope that can both image structures on the IC and measure voltage contrast signals from active circuits on the IC, and a means of extracting heat generated by the active IC. The method uses the system to identify the region of the IC to be probed, and to selectively remove all substrate material over the region to be probed using ion bombardment, and further identifies endpoint detection means of milling to the required depth so as to observe electrical states and waveforms on the active IC.

Described herein are a system and method of preparing integrated circuits (ICs) so that the ICs remain electrically active and can have their active circuitry probed for diagnostic and characterization purposes using charged particle beams. The system employs an infrared camera capable of looking through the silicon substrate of the ICs to image electrical circuits therein, a focused ion beam system that can both image the IC and selectively remove substrate material from the IC, a scanning electron microscope that can both image structures on the IC and measure voltage contrast signals from active circuits on the IC, and a means of extracting heat generated by the active IC. The method uses the system to identify the region of the IC to be probed, and to selectively remove all substrate material over the region to be probed using ion bombardment, and further identifies endpoint detection means of milling to the required depth so as to observe electrical states and waveforms on the active IC.

A multi-beam writing method includes acquiring a plurality of deflection coordinates for deflecting a beam to each of a plurality of pixels which are in each beam pitch region of a plurality of beam pitch regions, a number of pixels to be exposed by a beam in the each beam pitch region during each of tracking control period performed such that the multiple beams collectively follow a movement of a stage, and a deflection movement amount of the multiple beams at a time of tracking reset for resetting a tracking starting position after each of the tracking control period has passed; and generating a deflection sequence defined using the plurality of deflection coordinates, the number of pixels to be exposed during each of the tracking control period, and the deflection movement amount of the multiple beams at the time of tracking reset.

Analyzing a buried layer on a sample includes milling a spot on the sample using a charged particle beam of a focused ion beam (FIB) column to expose the buried layer along a sidewall of the spot. From a first perspective a first distance is measured between a first point on the sidewall corresponding to an upper surface of the buried layer and a second point on the sidewall corresponding to a lower surface of the buried layer. From a second perspective a second distance is measured between the first point on the sidewall corresponding to the upper surface of the buried layer and the second point on the sidewall corresponding to the lower surface of the buried layer. A thickness of the buried layer is determined using the first distance and the second distance.

Analyzing a buried layer on a sample includes milling a spot on the sample using a charged particle beam of a focused ion beam (FIB) column to expose the buried layer along a sidewall of the spot. From a first perspective a first distance is measured between a first point on the sidewall corresponding to an upper surface of the buried layer and a second point on the sidewall corresponding to a lower surface of the buried layer. From a second perspective a second distance is measured between the first point on the sidewall corresponding to the upper surface of the buried layer and the second point on the sidewall corresponding to the lower surface of the buried layer. A thickness of the buried layer is determined using the first distance and the second distance.

Methods for exposing a desired shape in an area on a surface using a charged particle beam system include determining a local pattern density for the area, based on an original set of exposure information. A pre-proximity effect correction (PEC) maximum dose for the local pattern density is determined, based on a pre-determined target post-PEC maximum dose. The pre-PEC maximum dose is calculated near an edge of the desired shape. Methods also include modifying the original set of exposure information with the pre-PEC maximum dose to create a modified set of exposure information.

A semiconductor manufacturing apparatus according to the present embodiment includes a stage on which a wafer can be placed. A separator separates a beam of impurities to be introduced into the wafer into an ion component and a neutral component. A controller switches the semiconductor manufacturing apparatus between a first mode and a second mode, where in the first mode, the ion component is introduced into the wafer and in the second mode, the neutral component is introduced into the wafer.

An ion source with a target holder for holding a solid dopant material is disclosed. The ion source comprises a thermocouple disposed proximate the target holder to monitor the temperature of the solid dopant material. In certain embodiments, a controller uses this temperature information to vary one or more parameters of the ion source, such as arc voltage, cathode bias voltage, extracted beam current, or the position of the target holder within the arc chamber. Various embodiments showing the connections between the controller and the thermocouple are shown. Further, embodiments showing various placement of the thermocouple on the target holder are also presented.

An ion source with a target holder for holding a solid dopant material is disclosed. The ion source comprises a thermocouple disposed proximate the target holder to monitor the temperature of the solid dopant material. In certain embodiments, a controller uses this temperature information to vary one or more parameters of the ion source, such as arc voltage, cathode bias voltage, extracted beam current, or the position of the target holder within the arc chamber. Various embodiments showing the connections between the controller and the thermocouple are shown. Further, embodiments showing various placement of the thermocouple on the target holder are also presented.