H01J2237/2007

PROCESS KIT HAVING TALL DEPOSITION RING AND SMALLER DIAMETER ELECTROSTATIC CHUCK (ESC) FOR PVD CHAMBER

Embodiments of process kits are provided herein. In some embodiments, a process kit, includes: a deposition ring configured to be disposed on a substrate support, the deposition ring comprising: an annular band having an upper surface and a lower surface, the lower surface including a step between a radially inner portion and a radially outer portion, the step extending downward from the radially inner portion to the radially outer portion; an inner lip extending upwards from the upper surface of the annular band and adjacent an inner surface of the annular band, and wherein an outer surface of the inner lip extends radially outward and downward from an upper surface of the inner lip to the upper surface of the annular band; a channel disposed radially outward of the annular band; and an outer lip extending upwardly and disposed radially outward of the channel.

FOCUS RING PLACEMENT TABLE
20220399190 · 2022-12-15 · ·

A focus ring placement table includes an annular ceramic heater on which a focus ring is placed, a metal base, an adhesive element bonding the metal base and the ceramic heater, an inner-peripheral-side protective element disposed between the metal base and the ceramic heater and bonded to an inner peripheral portion of the adhesive element, and an outer-peripheral-side protective element disposed between the metal base and the ceramic heater and bonded to an outer peripheral portion of the adhesive element. A coefficient of thermal expansion of the adhesive element is equal to or smaller than a coefficient of thermal expansion of the inner-peripheral-side protective element and is equal to or greater than a coefficient of thermal expansion of the outer-peripheral-side protective element.

METHOD AND APPARATUS TO REDUCE FEATURE CHARGING IN PLASMA PROCESSING CHAMBER

Embodiments provided herein include an apparatus and methods for the plasma processing of a substrate in a processing chamber. In some embodiments, aspects of the apparatus and methods are directed to reducing defectivity in features formed on the surface of the substrate, improving plasma etch rate, and increasing selectivity of etching material to mask and/or etching material to stop layer. In some embodiments, the apparatus and methods enable processes that can be used to prevent or reduce the effect of trapped charges, disposed within features formed on a substrate, on the etch rate and defect formation. In some embodiments, the plasma processing methods include the synchronization of the delivery of pulsed-voltage (PV) waveforms, and alternately the delivery of a PV waveform and a radio frequency (RF) waveform, so as to allow for the independent control of generation of electrons that are provided, during one or more stages of a PV waveform cycle, to neutralize the trapped charges formed in the features formed on the substrate.

METHOD AND SYSTEM FOR PROCESSING WAFER
20220392811 · 2022-12-08 ·

The present disclosure provides a method and a system therefore for processing wafer. The method includes: monitoring a distribution of particles in a chamber while processing the wafer; determining at least one parameter according to the distribution of the particles for configuring at least one device of the chamber; configuring the at least one device of the chamber according to the at least one parameter; and processing another wafer based on a recipe after configuring the at least one device of the chamber.

PLASMA PROCESSING APPARATUS

In a disclosed plasma processing apparatus, an electrostatic chuck provided in a chamber includes a first region on which a substrate is placed and a second region on which an edge ring is placed. The first region includes a first electrode provided therein. The second region including a second electrode provided therein. A first feed line connects the first electrode and a bias power supply generating a pulse of a voltage applied to the first electrode to each other. A second feed line connects the second electrode and the bias power supply or another bias power supply generating a pulse of the voltage applied to the second electrode to each other. The second feed line includes one or more sockets and one or more feed pins. The one or more feed pins have flexibility in a radial direction thereof and are fitted into the one or more sockets.

SUBSTRATE TREATING APPARATUS AND SUBSTRATE TREATING SYSTEM
20220384147 · 2022-12-01 · ·

Disclosed is a substrate treating apparatus. The substrate treating apparatus includes an index part having a load port, and a process executing part that receives a substrate from the index part and treats the substrate, the load port includes a housing having an interior space, a seating part disposed on an upper side of the housing, and on which a container that receives a substrate type sensor is positioned, and a charging unit that charges a power source device installed in the container in a wireless charging scheme.

SAMPLE FIXATION MECHANISM FOR TEST WITH NANO-PROBE, APPARATUS FOR TEST AND SAMPLE TEST METHOD
20220381804 · 2022-12-01 ·

The present disclosure discloses a sample fixation mechanism for a test with a nano-probe, an apparatus for a test with a nano-probe, and a sample test method. The sample fixation mechanism includes a base having a first assembly surface; a holder having a second assembly surface matched with the first assembly surface, wherein the holder further has a fixation surface opposite to the second assembly surface, and the fixation surface is configured to be adhered and fixed with the sample; a lock structure having a locked state and an unlocked state, wherein in the locked state, the lock structure is capable of fixing the holder relative to the base, and in the unlocked state, the holder may be removed from the base.

FREQUENCY BASED IMPEDANCE ADJUSTMENT IN TUNING CIRCUITS

A substrate processing system for processing a substrate within a processing chamber includes a matching network, a tuning circuit, and a controller. The matching network receives a first RF signal having a first frequency from a RF generator and impedance matches an input of the matching network to an output of the RF generator. The tuning circuit is distinct from the matching network and includes a circuit component having a first impedance. The tuning circuit receives an output of the matching network and outputs a second RF signal to a first electrode in a substrate support. The controller determines a target impedance for the circuit component, and based on the target impedance, signal the RF generator to adjust the first frequency of the first RF signal received at the matching network to a second frequency to alter the first impedance of the circuit component to match the target impedance.

SUBSTRATE SUPPORT, PLASMA PROCESSING APPARATUS, AND PLASMA PROCESSING METHOD

A substrate support disclosed herein includes a base and an electrostatic chuck (ESC). The ESC is located on the base. The base and the electrostatic chuck provide a first region configured to support a substrate and a second region extending to surround the first region and configured to support an edge ring. The first region or the second region includes a variable capacitor portion configured to have variable electrostatic capacitance.

LOW IMPEDANCE CURRENT PATH FOR EDGE NON-UNIFORMITY TUNING

Exemplary substrate support assemblies may include an electrostatic chuck body that defines a substrate support surface. The substrate support surface may define a plurality of protrusions that extend upward from the substrate support surface. A density of the plurality of protrusions within an outer region of the substrate support surface may be greater than in an inner region of the substrate support surface. The substrate support assemblies may include a support stem coupled with the electrostatic chuck body. The substrate support assemblies may include an electrode embedded within the electrostatic chuck body.