A manufacturing method of an epitaxial silicon wafer includes forming an epitaxial film made of silicon on a surface of a silicon wafer in a trichlorosilane gas atmosphere; and setting the nitrogen concentration of the surface of the epitaxial film through inward diffusion from a nitride film on the epitaxial film, the nitride film being formed by subjecting the silicon wafer provided with the epitaxial film to heat treatment in a nitrogen atmosphere.

Removal of substrates in a composite substrate is facilitated, and flaking of the composite substrate in an unintended process is prevented. A method for manufacturing a composite substrate includes: forming a first bonding material in a first surface of a first substrate; forming, in the first surface, at least one groove located more inward than a periphery in a plan view of the first substrate; forming the first bonding material along an inner wall of the at least one groove, the first bonding material not filling into space enclosed by the inner wall of the at least one groove; forming a second bonding material on a second surface of a second substrate; and bonding the first bonding material and the second bonding material together in a region except the at least one groove.

In a silicon carbide wafer in an embodiment, in the photoluminescence signal intensity spectrum obtained after irradiating a laser on one surface of the silicon carbide wafer, the number of peak signals having an intensity more than 1.2 times the average signal intensity of the spectrum is 1/cm.sup.2 or less.

A method for making a field effect transistor includes providing a graphene nanoribbon composite structure. The graphene nanoribbon composite structure includes a substrate and a plurality of graphene nanoribbons spaced apart from each other. The plurality of graphene nanoribbons are located on the substrate and extend substantially along a same direction, and each of the plurality of graphene nanoribbons includes a first end and a second end opposite to the first end. A source electrode is formed on the first end, and a drain electrode is formed on the second end. The source electrode and the drain electrode are electrically connected to the plurality of graphene nanoribbons. An insulating layer is formed on the plurality of graphene nanoribbons, and the plurality of graphene nanoribbons are between the insulating layer and the substrate. A gate is formed on a surface of the insulating layer away from the substrate.

A method for manufacturing a structured substrate provided with a trap-rich layer whereon rests a stack consisting of an insulating layer and of a layer of single-crystal material, includes forming an amorphous silicon layer on a front face of a silicon substrate and heat treating intended to convert the amorphous silicon layer into a trap-rich layer made of single-crystal silicon grains. The heat treatment conditions in terms of duration and of temperature are adjusted to limit the grains to a size less than 200 nm. The method also includes overlapping the trap-rich layer with an insulating layer and a layer of single-crystal material.

A semiconductor structure and a manufacturing method thereof is provided. The semiconductor structure includes a high-resistance silicon substrate and a compound layer located on the high-resistance silicon substrate, by performing a way such as local n-type ion implantation, local n-type ion diffusion, selective region epitaxy growth and the like to the high-resistance silicon substrate, an upper part of the high-resistance silicon substrate is formed into a plurality of local n-type semiconductor regions, p-type semiconductor conductive regions formed in the upper part of the high-resistance silicon substrate due to a diffusion of Al, Ga atoms in the compound layer are eliminated, thereby parasitic capacitance caused by a conductive substrate is greatly reduced, and a resistivity of the high-resistance silicon substrate may be improved under high temperature conditions, and then efficiencies and radio frequency characteristics of a microwave device constituted by the entire semiconductor structure are improved.

Wafers including a diamond layer and a semiconductor layer having III-Nitride compounds and methods for fabricating the wafers are provided. A nucleation layer, at least one semiconductor layer having III-Nitride compound and a protection layer are formed on a silicon substrate. Then, a silicon carrier wafer is glass bonded to the protection layer. Subsequently the silicon substrate, nucleation layer and a portion of the semiconductor layer are removed. Then, an intermediate layer, a seed layer and a first diamond layer are sequentially deposited on the III-Nitride layer. Next, the silicon carrier wafer and the protection layer are removed. Then, a silicon substrate wafer that includes a protection layer, silicon substrate and a diamond layer is prepared and glass bonded to the first diamond layer.

A method for manufacturing a semiconductor substrate according to the present invention includes preparing a seed substrate containing a semiconductor material, forming an ion implanted layer at a certain depth from a front surface of a main surface of the seed substrate by implanting ions into the seed substrate, growing a semiconductor layer on the main surface of the seed substrate with a vapor-phase synthesis method, and separating a semiconductor substrate including the semiconductor layer and a part of the seed substrate by irradiating the front surface of the main surface of at least any of the semiconductor layer and the seed substrate with light.

Provided are a composite substrate in which a wafer to be bonded has a sufficiently small surface roughness and which can be prevented from causing film peeling, and a method for producing the composite substrate. The composite substrate 40 of the present invention has a silicon wafer 10, an interlayer 11, and a single-crystal silicon thin film or oxide single-crystal thin film 20a stacked in the order listed and has a damaged layer 12a in a portion of the silicon wafer 10 on the side of the interlayer 11.

A first transfer device and a second transfer device are configured to transfer a first substrate and a second substrate in a normal pressure atmosphere. A third transfer device is configured to transfer the first substrate and the second substrate in a decompressed atmosphere. A load lock chamber has accommodation sections allowed to accommodate therein the first substrate and the second substrate, and is allowed to switch an inside of the accommodation sections between the normal pressure atmosphere and the decompressed atmosphere. Multiple gates are respectively disposed on three different sides of the load lock chamber, and allowed to open or close the load lock chamber. The first transfer device, the second transfer device, and the third transfer device carry the first substrate and the second substrate into/out of the load lock chamber through different gates among the multiple gates.