Patent classifications
H01L21/027
EUV GENERATOR, EUV LITHOGRAPHY APPARATUS INCLUDING THE SAME, AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE USING THE SAME
An extreme ultraviolet light generator includes a collector including a first focus and a second focus, a droplet feeder configured to provide a source droplet toward the first focus of the collector, a laser generator configured to irradiate a laser toward the first focus of the collector, an airflow controller between the first focus and the second focus of the collector, the airflow controller having a ring shape, and the airflow controller including at least one slit, and a first part and a second part hinged to each other, and a control gas feeder configured to provide a control gas towards the at least one slit of the airflow controller.
RESIST UNDERLAYER FILM-FORMING COMPOSITION, RESIST UNDERLAYER FILM, AND METHOD OF PRODUCING SEMICONDUCTOR SUBSTRATE
A resist underlayer film-forming composition includes: a polysiloxane compound including a first structural unit represented by formula (1); and a solvent. X represents a group represented by formula (2); a is an integer of 1 to 3; R.sup.1 represents a halogen atom, a hydroxy group, or a monovalent organic group having 1 to 20 carbon atoms; and b is an integer of 0 to 2; and a sum of a and b is no greater than 3. R.sup.2 represents a monovalent hydrocarbon group having 1 to 20 carbon atoms; n is 1 or 2; R.sup.3 represents a hydrogen atom or a monovalent organic group having 1 to 20 carbon atoms; L represents a single bond or a divalent linking group; and * denotes a site bonding to the silicon atom in the formula (1). The composition is suitable for lithography with an electron beam or extreme ultraviolet ray.
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METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
A method of manufacturing a semiconductor device includes forming an underlying structure in a first area and a second area over a substrate. A first layer is formed over the underlying structure. The first layer is removed from the second area while protecting the first layer in the first area. A second layer is formed over the first area and the second area, wherein the second layer has a smaller light transparency than the first layer. The second layer is removed from the first area, and first resist pattern is formed over the first layer in the first area and a second resist pattern over the second layer in the second area.
METHOD OF FORMING AN INTEGRATED CIRCUIT VIA
A method of forming a via is provided. A lower metal element is formed, and a first patterned photoresist is used to form a sacrificial element over the lower metal element. A dielectric region including a dielectric element projection extending upwardly above the sacrificial element is formed. A second patterned photoresist including a second photoresist opening is formed, wherein the dielectric element projection is at least partially located in the second photoresist opening. A dielectric region trench opening is etched in the dielectric region. The sacrificial element is removed to define a via opening extending downwardly from the dielectric region trench opening. The dielectric region trench opening and the via opening are filled to define (a) an upper metal element in the dielectric region trench opening and (b) a via in the via opening, wherein the via extends downwardly from the upper metal element.
APPARATUS AND METHOD FOR PROCESSING SUBSTRATE
An apparatus for processing a substrate includes a process chamber; a support which is placed inside the process chamber and supports the substrate; a fluid supplier which supplies fluid into the process chamber; and a controller configured to perform a compressing step to bring the fluid into a supercritical phase inside the process chamber, in which the compressing step includes a continuous first section and second section, the fluid supplier includes a first portion and a second portion, and the controller supplies the fluid into the process chamber at a first speed during the first section using the first portion, and supplies the fluid into the process chamber at a second speed higher than the first speed during the second section using the second portion.
Methods of Forming Patterns
A method of forming sub-resolution features that includes: exposing a photoresist layer formed over a substrate to a first ultraviolet light (UV) radiation having a first wavelength of 365 nm or longer through a mask configured to form features at a first critical dimension, the photoresist layer including first portions exposed to the first UV radiation and second portions unexposed to the first UV radiation after exposing with the first UV radiation; exposing the first portions and the second portions to a second UV radiation; and developing the photoresist layer after exposing the photoresist layer to the second UV radiation to form the sub-resolution features having a second critical dimension less than the first critical dimension.
Methods of manufacturing semiconductor devices
A method of manufacturing a semiconductor device includes forming a first pattern structure having a first opening and a second pattern structure having a second opening on a substrate, forming a gap fill layer in the second opening, forming fences and contact structures in the first opening, removing the gap fill layer in the second opening, forming an upper conductive layer to cover the first and second pattern structures, the fences, and the contact structures, forming a mask pattern based on a photolithography process using the second pattern structure covered by the upper conductive layer as an align mark, and etching the upper conductive layer using the mask pattern to form upper conductive patterns. A width of the second opening is larger than a width of a first opening. A thickness of the upper conductive layer is smaller than a depth of the second opening.
Sequential infiltration synthesis apparatus
The disclosure relates to a sequential infiltration synthesis apparatus comprising: a reaction chamber constructed and arranged to accommodate at least one substrate; a first precursor flow path to provide the first precursor to the reaction chamber when a first flow controller is activated; a second precursor flow path to provide a second precursor to the reaction chamber when a second flow controller is activated; a removal flow path to allow removal of gas from the reaction chamber; a removal flow controller to create a gas flow in the reaction chamber to the removal flow path when the removal flow controller is activated; and, a sequence controller operably connected to the first, second and removal flow controllers and the sequence controller being programmed to enable infiltration of an infiltrateable material provided on the substrate in the reaction chamber. The apparatus may be provided with a heating system.
Staggered die stacking across heterogeneous modules
An electronic package can include a substrate, a first die and a second die. The first die can include a first thickness and the second die can include a second thickness. The first and second dies can be coupled to the substrate. A mold can be disposed on the substrate and cover the first die and the second die. The mold can include a planar upper surface. A first via, having a first length, can be extended between the first die and the planar upper surface. A second via, having a second length, can be extended between the second die and the planar upper surface. In some examples, a third die can be communicatively coupled to the first die using the first via and the second die using the second via.
Method of heating SOC film on wafer by electromagnetic wave generator and heating apparatus using the same
The present disclosure provides a method of heating a spin on coating (SOC) film on a wafer. The method includes actions S401 to S405. In action S401, a heating apparatus is provided. The heating apparatus includes a bake plate and an electromagnetic wave generator. In action S402, the bake plate is heated by a heating unit disposed in the bake plate. In action S403, the wafer is placed on the bake plate of the heating apparatus. In action S404, the electromagnetic wave generator generates an electromagnetic wave to heat the SOC film. The electromagnetic wave generated by the electromagnetic wave generator has a frequency within a range of 1 THz to 100 THz. In action S405, the wafer is removed from the bake plate of the heating apparatus.