H01L21/04

ELECTRONIC DEVICE
20230079069 · 2023-03-16 ·

An electronic device, and method of producing an electronic device, are disclosed. The electronic device comprises a diamond substrate 10. Within the substrate 10 is an electrode 12, known as a ‘buried electrode’. A first surface 14 of the substrate 10 is provided with a conductive contact region 16. The electrode 12 is electrically connected to the contact region 16 by a conductive pillar 18. The electrode, conductive pillar, and contact region comprise modified portions of the diamond substrate, for example comprising at least one of graphitic carbon, amorphous carbon, and a combination of SP2 and SP3 phases of carbon, formed from a portion of diamond substrate.

SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, INVERTER CIRCUIT, DRIVE DEVICE, VEHICLE, AND ELEVATOR
20230079954 · 2023-03-16 · ·

According to an embodiment, provided is a semiconductor device including: a first electrode; a second electrode; and a silicon carbide layer disposed between the first electrode and the second electrode, the silicon carbide layer including: a first silicon carbide region of an n-type; and a second silicon carbide region disposed between the first silicon carbide region and the first electrode, the second silicon carbide being in contact with the first electrode, and the second silicon carbide containing one oxygen atom bonding with four silicon atoms.

Semiconductor device and method for manufacturing semiconductor device

An object is to provide a semiconductor device that can prevent organic contamination of an electrode including a plurality of laminated metal layers. A semiconductor device includes: a semiconductor substrate; and an electrode including a plurality of layers laminated on a principal surface of the semiconductor substrate. The electrode includes: a first metal layer in contact with the principal surface of the semiconductor substrate, the first metal layer containing Al; an oxide layer formed on a surface of the first metal layer, the oxide layer containing a metal and oxygen; and a second metal layer formed on a surface of the oxide layer. Concentrations of the oxygen in the oxide layer are higher than or equal to 8.0×10.sup.21/cm.sup.3 and lower than or equal to 4.0×10.sup.22/cm.sup.3.

SEMICONDUCTOR DEVICE

A method includes orienting a silicon carbide layer to a first crystal channel direction relative to a first ion beam and implanting phosphorous into the silicon carbide layer using the first ion beam to define a first doped region in the silicon carbide layer. A deviation angle between the first crystal channel direction and the first ion beam is less than ±1° and the first crystal channel direction comprises a <0001> direction or a <11-23> direction.

SEMICONDUCTOR DEVICE MANUFACTURING METHOD

A semiconductor device manufacturing method of embodiments includes: forming a silicon oxide film on a surface of a silicon carbide layer; performing a first heat treatment in an atmosphere containing nitrogen gas at a temperature equal to or more than 1200° C. and equal to or less than 1600° C.; and performing a second heat treatment in an atmosphere containing nitrogen oxide gas at a temperature equal to or more than 750° C. and equal to or less than 1050° C.

Diamond semiconductor system and method
11605541 · 2023-03-14 · ·

Disclosed herein is a new and improved system and method for fabricating diamond semiconductors. The method may include the steps of selecting a diamond semiconductor material having a surface, exposing the surface to a source gas in an etching chamber, forming a carbide interface contact layer on the surface; and forming a metal layer on the interface layer.

Silicon Carbide Trench Gate MOSFET and Method for Manufacturing Thereof
20230130726 · 2023-04-27 ·

The present disclosure provides a silicon carbide trench gate metal oxide semiconductor field effect transistor (MOSFET) and a method for manufacturing thereof. The silicon carbide trench gate MOSFET includes: a substrate having a first doping type, an epitaxial layer formed on the substrate and having the first doping type, an epitaxial well region formed above the epitaxial layer and having a second doping type, a first source contact region formed in the epitaxial well region and having the first doping type, a second source contact region formed in the epitaxial well region and having the second doping type, a trench gate, a source electrode and a drain electrode, wherein the trench gate includes a gate dielectric and a gate electrode, the silicon carbide trench gate MOSFET further includes a injection-type current diffusion region, which is wrapped around the bottom of the trench gate and has the first doping type.

Silicon carbide semiconductor device
11637182 · 2023-04-25 · ·

A silicon carbide semiconductor device includes a semiconductor substrate, a first semiconductor layer, a second semiconductor layer, a first semiconductor region, and a gate electrode. Protons are implanted in a first region spanning a predetermined distance from a surface of the semiconductor substrate facing toward the first semiconductor layer, in a second region spanning a predetermined distance from a surface of the first semiconductor layer on the second side of the first semiconductor layer facing toward the semiconductor substrate, in a third region spanning a predetermined distance from a surface of the first semiconductor layer on the first side of the first semiconductor layer facing toward the second semiconductor layer, and in a fourth region spanning a predetermined distance from a surface of the second semiconductor layer on the second side of the second semiconductor layer facing toward the first semiconductor layer.

Semiconductor component having a SiC semiconductor body

A silicon carbide substrate has a trench extending from a main surface of the silicon carbide substrate into the silicon carbide substrate. The trench has a trench width at a trench bottom. A shielding region is formed in the silicon carbide substrate. The shielding region extends along the trench bottom. In at least one doping plane extending approximately parallel to the trench bottom, a dopant concentration in the shielding region over a lateral first width deviates by not more than 10% from a maximum value of the dopant concentration. The first width is less than the trench width and is at least 30% of the trench width.

METHOD OF MANUFACTURING SUPER JUNCTION, AND SUPER JUNCTION SCHOTTKY DIODE USING SAME
20230123112 · 2023-04-20 ·

The present invention relates to the field of semiconductors, and discloses a manufacturing method of a super junction and a super-junction Schottky diode thereof. The manufacturing method of the super junction includes forming an epitaxial layer on the surface of a wide-bandgap semiconductor substrate by an epitaxial growth process; implanting first doping ions into at least part of a region of the epitaxial layer along a preset crystal orientation of the wide-bandgap semiconductor to form a first conductive type region; and implanting second doping ions into at least part of the first conductive type region along the preset crystal orientation of the wide-bandgap semiconductor to form a second conductive type region, wherein the second doping ions and the first doping ions have different conductive types, and the preset crystal orientation is a crystal orientation which enables the doping ions to generate a channel effect when the doping ions are implanted along the preset crystal orientation.