Patent classifications
H01L21/683
GUIDED TRANSPORT PATH CORRECTION
A printer deposits material onto a substrate as part of a manufacturing process for an electronic product; at least one transported component experiences error, which affects the deposition. This error is mitigated using transducers that equalize position of the component, e.g., to provide an “ideal” conveyance path, thereby permitting precise droplet placement notwithstanding the error. In one embodiment, an optical guide (e.g., using a laser) is used to define a desired path; sensors mounted to the component dynamically detect deviation from this path, with this deviation then being used to drive the transducers to immediately counteract the deviation. This error correction scheme can be applied to correct for more than type of transport error, for example, to correct for error in a substrate transport path, a printhead transport path and/or split-axis transport non-orthogonality.
Mask-integrated surface protective tape
A mask-integrated surface protective tape, containing: a substrate film; a temporary-adhesive layer provided on the substrate film; and a mask material layer provided on the temporary-adhesive layer; wherein the mask material layer and the temporary-adhesive layer each contain a (meth)acrylic copolymer; and wherein the mask-integrated surface protective tape is used for a method of producing a semiconductor chip utilizing a plasma-dicing.
RF devices with enhanced performance and methods of forming the same
The present disclosure relates to a radio frequency device that includes a transfer device die and a multilayer redistribution structure underneath the transfer device die. The transfer device die includes a device region with a back-end-of-line (BEOL) portion and a front-end-of-line (FEOL) portion over the BEOL portion and a transfer substrate. The FEOL portion includes isolation sections and an active layer surrounded by the isolation sections. A top surface of the device region is planarized. The transfer substrate resides over the top surface of the device region. Herein, silicon crystal does not exist within the transfer substrate or between the transfer substrate and the active layer. The multilayer redistribution structure includes a number of bump structures, which are at a bottom of the multilayer redistribution structure and electrically coupled to the FEOL portion of the transfer device die.
Substrate transport apparatus, substrate processing apparatus, and substrate transport method
A substrate transport apparatus includes transport hands that clamp substrates by vacuum pressures, respectively, and that are located at different heights, a vacuum pressure supply unit that supplies the vacuum pressures to the transport hands, and a controller that controls the vacuum pressure supply unit to supply the vacuum pressures to the transport hands or interrupt the supply of the vacuum pressures to the transport hands. The controller controls the vacuum pressure supply unit such that the vacuum pressures of the transport hands are turned off at the same height from a substrate support member.
Method for manufacturing a handle substrate intended for temporary bonding of a substrate
Manufacturing a handle substrate includes: providing a support substrate having a receiving face; depositing an anti-adherent formulation including a first solvent over the receiving face of the support substrate so as to form a film; depositing a liquid formulation over a face of the film, before the complete evaporation of the first solvent, the liquid formulation being intended to form an adhesive layer; and evaporating the first solvent so as to obtain an anti-adherent film from the film in order to obtain the handle substrate and to obtain a bonding energy between the anti-adherent film and the adhesive layer lower than about 1.2 J/m.sup.2. The step of depositing of a liquid formulation is carried out when the face of the film has a water drop angle smaller than 65 degrees, so as to avoid any risk of dewetting of the liquid formulation.
INTEGRATING AND ACCESSING PASSIVE COMPONENTS IN WAFER-LEVEL PACKAGES
In accordance with disclosed embodiments, there is a method of integrating and accessing passive components in three-dimensional fan-out wafer-level packages. One example is a microelectronic die package that includes a die, a package substrate attached to the die on one side of the die and configured to be connected to a system board, a plurality of passive devices over a second side of the die, and a plurality of passive device contacts over a respective passive die, the contacts being configured to be coupled to a second die mounted over the passive devices and over the second side of the die.
SIMULTANEOUS BONDING APPROACH FOR HIGH QUALITY WAFER STACKING APPLICATIONS
In some embodiments, the present disclosure relates to a method that includes aligned a first wafer with a second wafer. The second wafer is spaced apart from the first wafer. The first wafer is arranged on a first electrostatic chuck (ESC). The first ESC has electrostatic contacts that are configured to attract the first wafer to the first ESC. Further, the second wafer is brought toward the first wafer to directly contact the first wafer at an inter-wafer interface. The inter-wafer interface is localized to a center of the first wafer. The second wafer is deformed to gradually expand the inter-wafer interface from the center of the first wafer toward an edge of the first wafer. The electrostatic contacts of the first ESC are turned OFF such that the first and second wafers are bonded to one another by the inter-wafer interface.
Fine Pitch BVA Using Reconstituted Wafer With Area Array Accessible For Testing
A microelectronic assembly having a first side and a second side opposite therefrom is disclosed. The microelectronic assembly may include a microelectronic element having a first face, a second face opposite the first face, a plurality of sidewalls each extending between the first and second faces, and a plurality of element contacts. The microelectronic assembly may also include an encapsulation adjacent the sidewalls of the microelectronic element. The microelectronic assembly may include electrically conductive connector elements each having a first end, a second end remote from the first end, and an edge surface extending between the first and second ends, wherein one of the first end or the second end of each connector element is adjacent the first side of the package. The microelectronic assembly may include a redistribution structure having terminals, the redistribution structure adjacent the second side of the package, the terminals being electrically coupled with the connector elements.
APPARATUS AND METHOD FOR PROCESSING SUBSTRATE
Embodiments of the inventive concept described herein relate to an apparatus and method for removing an adhesive exposed to the outside from an object being processed. The apparatus for removing the adhesive exposed to the outside from an edge region of the object being processed, in which the object has a patterned substrate and a support plate bonded together by the adhesive, The cover liquid nozzle dispenses the cover liquid onto a cover area of a top surface of the object other than the exposed area, and the controller controls the cover liquid dispensing member to adjust a flow rate of the cover liquid to cause a removal rate of the adhesive to remain constant.
PROCESSING DEVICE AND METHOD
A processing device and method for safely processing a wafer having bumps formed on a surface thereof. A processing device is provided with: a chuck capable of holding a bump region of a wafer; a support ring having a support surface for supporting a bend region which extends from the bump region to an outer peripheral region and in which a film is bent, the support ring capable of supporting the outer peripheral region of the wafer; and a chuck table in which the chuck is housed substantially centrally and the support ring is housed around the chuck.