To provide a composition for a three-dimensional integrated circuit capable of forming a filling interlayer excellent in thermal conductivity also in a thickness direction, using agglomerated boron nitride particles excellent in the isotropy of thermal conductivity, disintegration resistance and kneading property with a resin. A composition for a three-dimensional integrated circuit, comprising agglomerated boron nitride particles which have a specific surface area of at least 10 m.sup.2/g, the surface of which is constituted by boron nitride primary particles having an average particle size of at least 0.05 μm and at most 1 μm, and which are spherical, and a resin (A) having a melt viscosity at 120° C. of at most 100 Pa.Math.s.

A manufacturing method of an array substrate is provided. The method includes sequentially depositing a first electrode layer and a gate metal layer on a base substrate, the first electrode layer including at least two conductive layers, formation materials of the at least two conductive layers having different etching rates. The method also includes forming a photoresist layer on the gate metal layer, exposing and developing the photoresist layer using a halftone mask plate, performing a first etching process on the gate metal layer, etching the first electrode layer, and ashing the photoresist layer, performing a second etching process on the gate metal layer by using remaining photoresist layer as a mask, stripping the remaining photoresist layer, and sequentially forming a semiconductor layer, a source and drain electrode layer, a via-hole and a second electrode layer on the gate metal layer on which the second etching process has been performed.

A component such as a display may have a substrate and thin-film circuitry on the substrate. The thin-film circuitry may be used to form an array of pixels for a display or other circuit structures. Metal traces may be formed among dielectric layers in the thin-film circuitry. Metal traces may be provided with insulating protective sidewall structures. The protective sidewall structures may be formed by treating exposed edge surfaces of the metal traces. A metal trace may have multiple layers such as a core metal layer sandwiched between barrier metal layers. The core metal layer may be formed from a metal that is subject to corrosion. The protective sidewall structures may help prevent corrosion in the core metal layer. Surface treatments such as oxidation, nitridation, and other processes may be used in forming the protective sidewall structures.

An array substrate, a manufacturing method thereof and a display device are provided. The array substrate comprises a base substrate, and a gate line and a common electrode provided in the same layer, a gate insulation layer, an active layer, a source electrode and a drain electrode provided in the same layer; and a pixel electrode provided in the same layer as the active layer, sequentially arranged on the base substrate.

An array substrate, a manufacturing method thereof and a display device are provided. The array substrate comprises a base substrate, and a gate line and a common electrode provided in the same layer, a gate insulation layer, an active layer, a source electrode and a drain electrode provided in the same layer; and a pixel electrode provided in the same layer as the active layer, sequentially arranged on the base substrate.

Provided are an array substrate and a manufacturing method therefor, and a display panel. The array substrate comprises: a base substrate; a data line and a passivation layer which are formed on the base substrate; a common electrode layer formed on the passivation layer; and a shielding electrode layer and a barrier layer which are formed on the base substrate, wherein the shielding electrode layer is arranged between the data line and the passivation layer, the barrier layer is arranged between the data line and the shielding electrode layer, the shielding electrode layer is grounded, and the barrier layer is made of a material with an insulation function.

An organic light-emitting display apparatus includes: an auxiliary electrode including: a first conductive layer; and a second conductive layer disposed on the first conductive layer, the second conductive layer having a resistance higher than a resistance of the first conductive layer, wherein the second conductive layer includes an opening portion exposing the first conductive layer; a pixel electrode; a pixel definition layer disposed on the pixel electrode and the auxiliary electrode, the pixel definition layer exposing the pixel electrode and the auxiliary electrode; a first intermediate layer disposed on the pixel electrode and the auxiliary electrode, the first intermediate layer including a first opening corresponding to the opening portion; an emission layer disposed on the first intermediate layer overlapping the exposed pixel electrode.

The present disclosure provides an array substrate comprising a plurality of gate lines, and a plurality of data lines that intersect the plurality of gate lines. A plurality of pixel units are defined by the plurality of gate lines and the plurality of data lines which intersect each other. Each pixel unit comprises a thin film transistor, a gate insulating layer, a passivation layer arranged on one side of the gate insulating layer, a pixel electrode and a common electrode, wherein a source and a drain of the thin film transistor are arranged between the passivation layer and the gate insulating layer, the common electrode is arranged on the other side of the gate insulating layer opposite to the passivation layer, and the pixel electrode is arranged on the passivation layer. The present disclosure further provides a method for manufacturing an array substrate and a display device.

The present invention discloses an array substrate, comprising: a substrate; peripheral lines provided in a peripheral region of the substrate; an insulation layer provided over the peripheral lines and comprising through holes located at either side of a breakable portion of the peripheral line respectively; and conductive portions provided at the respective through holes of the insulation layer and electrically connected to the peripheral line through the through holes. With the array substrate having the above configuration, when the peripheral line of the array substrate is broken, a repairing sheet can be spanned the conductive portions at either side of the broken portion, such that portions of the peripheral line on either side of the broken portion are electrically connected through the repairing sheet, thereby the broken portion of the peripheral line can be conveniently repaired so that the array substrate can be used normally. The present invention further provides a repairing sheet for the array substrate, a display panel comprising the array substrate and a method of repairing the array substrate.

The present invention discloses an array substrate, comprising: a substrate; peripheral lines provided in a peripheral region of the substrate; an insulation layer provided over the peripheral lines and comprising through holes located at either side of a breakable portion of the peripheral line respectively; and conductive portions provided at the respective through holes of the insulation layer and electrically connected to the peripheral line through the through holes. With the array substrate having the above configuration, when the peripheral line of the array substrate is broken, a repairing sheet can be spanned the conductive portions at either side of the broken portion, such that portions of the peripheral line on either side of the broken portion are electrically connected through the repairing sheet, thereby the broken portion of the peripheral line can be conveniently repaired so that the array substrate can be used normally. The present invention further provides a repairing sheet for the array substrate, a display panel comprising the array substrate and a method of repairing the array substrate.