Methods of bonding one or more dies to a substrate are provided herein. In some embodiments, a method of bonding one or more dies to a substrate includes: applying a material coating on the one or more dies or the substrate; placing the one or more dies on the substrate so that the one or more dies temporarily adhere to the substrate via surface tension or tackiness of the material coating; inspecting each of the one or more dies that are placed on the substrate for defects; and removing any of the one or more dies that are found to have defects.

An active matrix display where in one embodiment each cell comprises: a driving circuit for providing current to light emitting devices placed in the cell under the control of a data driver signal, a first light emitting device location connected to the driving circuit and a second light emitting device location connected in series to the first light emitting device location. A first thin-film transistor (TFT) is connected in parallel with the first light emitting device location and a second TFT is connected in parallel with the second light emitting device location, its gate node connected to the gate node of the first TFT. One terminal of a third TFT is connected to the gate nodes of the first and second TFTs and selectively connects a control signal to the first and second TFTs under the control of a scan driver signal. The control signal determines which of a first or second light emitting device placed in the cell emits light when the driving circuit provides current.

Disclosed in the present specification are an apparatus and a method capable of quickly verifying a plurality of micro LEDs. An LED verification substrate according to the present specification is a micro LED verification substrate having a plurality of verification chips, wherein each verification chip can comprise: a first contact deposited on the upper side of a lower substrate; a first passivation layer deposited on the upper side of the first contact; a second contact deposited on the upper side of the first passivation layer; a second passivation layer deposited on the upper side of the second contact; a first bump electrically connected to the first contact and protruding above the upper surface of the second passivation layer; and a second bump electrically connected to the second contact and protruding above the upper surface of the second passivation layer.

Devices and methods of their fabrication for pixels or displays are disclosed. Pixels and displays having redundant subpixels are described. Subpixels are initially isolated by an unprogrammed antifuse. A subpixel is connected to the display by programming the antifuse, electrically connecting it to the pixel or display. Defective subpixels can be determined by photoluminescent testing or electroluminescent testing, or both. A redundant subpixel can replace a defective subpixel before pixel or display fabrication is complete.

A microLED mass transfer stamping system includes a stamp substrate with an array of trap sites, each configured with a columnar-shaped recess to temporarily secure a keel extended from a bottom surface of a microLED. In the case of surface mount microLEDs, the keel is electrically nonconductive. In the case of vertical microLEDs, the keel is an electrically conductive second electrode. The stamping system also includes a fluidic assembly carrier substrate with an array of wells having a pitch separating adjacent wells that matches the pitch separating the stamp substrate trap sites. A display substrate includes an array of microLED pads with the same pitch as the trap sites. The stamp substrate top surface is pressed against the display substrate, with each trap site interfacing a corresponding microLED site, and the microLEDs are transferred. Fluidic assembly stamp substrates are also presented for use with microLEDs having keels or axial leads.

In an embodiment, a method includes: stacking a plurality of first dies to form a device stack; revealing testing pads of a topmost die of the device stack; testing the device stack using the testing pads of the topmost die; and after testing the device stack, forming bonding pads in the topmost die, the bonding pads being different from the testing pads.

Methods for manufacturing an electronic device are provided. A representative method includes providing a substrate. The substrate has an active layer, a first patterned metal layer passing through a passivation layer to electrically connected to the active layer, a second patterned metal layer passing through an insulating layer to electrically connected to the first patterned metal layer, and a metal layer under the second patterned metal layer. A part of the metal layer does not serve as a portion of a thin film transistor, and the part of the metal layer serves as a portion of a gate line. The method includes providing a carrier substrate supporting a plurality of elements, conducting a testing to the elements, transferring the elements from the carrier substrate to the second patterned metal layer of the substrate, and fixing the elements to the substrate.

A method of manufacturing electronic chips containing low-dispersion components, including the steps of: mapping the average dispersion of said components according to their position in test semiconductor wafers; associating, with each component of each chip, auxiliary correction elements; activating by masking the connection of the correction elements to each component according to the initial mapping.

A wafer manufacturing method includes a wafer preparing step of preparing a wafer including a semiconductor device formed in each of a plurality of regions demarcated by a plurality of streets intersecting each other, a support substrate fixing step of fixing the wafer to a support substrate, a removing step of removing, from the wafer, a defective device region including a semiconductor device determined to be a defective product among a plurality of the semiconductor devices formed in the wafer, and a fitting step of fitting, into a removed region formed by removing the defective device region from the wafer, a device chip including a semiconductor device as a non-defective product having same functions as those of the semiconductor device determined to be a defective product and having a size capable of being fitted into the removed region, and fixing the device chip to the support substrate.

A wafer manufacturing method includes a wafer preparing step of preparing a wafer including a semiconductor device formed in each of a plurality of regions demarcated by a plurality of streets intersecting each other, a removing step of removing, from the wafer, a defective device region including a semiconductor device determined to be a defective product among a plurality of the semiconductor devices formed in the wafer, and a fitting step of fitting, into a removed region formed by removing the defective device region from the wafer, a device chip including a semiconductor device as a non-defective product having same functions as those of the semiconductor device determined to be a defective product and having a size capable of being fitted into the removed region.