Patent classifications
H01L22/24
METHOD OF EVALUATING GETTERING PROPERTY
A gettering property evaluating method for a wafer includes: a gettering layer forming step of polishing a back surface opposite to a front surface of a semiconductor wafer by use of a polishing wheel to form polishing marks on the back surface and to form a gettering layer inside the semiconductor wafer and beneath the polishing marks; an imaging step of imaging at least a unit region of the back surface formed with the polishing marks by imaging means; a counting step of counting the number of the polishing marks having a width of 10 to 500 nm present in the unit region imaged; and a comparing step of comparing the number of the polishing marks counted by the counting step with a predetermined value to determine whether or not the counted number is not less than the predetermined value.
Substrate processing device and component inspection method for substrate processing device
A substrate processing device according to the present invention is a substrate processing device that performs substrate processing with a processing solution and includes inspection means for inspecting degradation of components constituting the substrate processing device. The inspection means includes: capturing means for acquiring image data of the components; color information acquisition means for acquiring color information of an inspection target component from the image data acquired by the capturing means; and degradation determination means for determining a degradation degree of the inspection target component based on the acquired color information.
Electrically parallel fused LEDs
An LED component comprises a plurality of fused light-emitting diodes (LEDs) (e.g., micro-transfer printable or micro-transfer printed LEDs). Each fused LED comprises an LED with first and second LED electrical connections for providing power to the LED and a fuse with first and second fuse electrical connections. The first LED electrical connection is electrically connected to the first electrode. The first fuse electrical connection is electrically connected to the second LED electrical connection and the second fuse electrical connection is electrically connected to the second electrode. A fused LED source wafer comprises an LED wafer having a patterned sacrificial layer forming an array of sacrificial portions separated by anchors and a plurality of fused LED components, each fused LED component disposed entirely on or over a corresponding sacrificial portion. A light-emission system comprises a system substrate and a plurality of fused LED components disposed on or over the system substrate.
AUTOMATED INSPECTION TOOL
Some embodiments of the present disclosure relate to a processing tool. The tool includes a housing enclosing a processing chamber, and an input/output port configured to pass a wafer through the housing into and out of the processing chamber. A back-side macro-inspection system is arranged within the processing chamber and is configured to image a back side of the wafer. A front-side macro-inspection system is arranged within the processing chamber and is configured to image a front side of the wafer according to a first image resolution. A front-side micro-inspection system is arranged within the processing chamber and is configured to image the front side of the wafer according to a second image resolution which is higher than the first image resolution.
Implanted Photoresist Stripping Process
Processes for removing a photoresist from a substrate after, for instance, ion implantation are provided. In one example implementation, a process can include placing a substrate having a bulk photoresist and a crust formed on the bulk photoresist in a processing chamber. The process can include initiating a first strip process in the processing chamber. The process can include accessing an optical emission signal associated with a plasma during the first strip process. The process can include identifying an endpoint for the first strip process based at least in part on the optical emission signal. The process can include terminating the first strip process based at least in part on the endpoint. The process can include initiating a second strip process to remove the photoresist from the substrate.
Method for evaluating semiconductor substrate
The present invention provides a method for evaluating a semiconductor substrate subjected to a defect recovery heat treatment to recover a crystal defect in the semiconductor substrate having the crystal defect, flash lamp annealing is performed as the defect recovery heat treatment, and the method includes steps of measuring the crystal defect in the semiconductor substrate, which is being recovered, by controlling treatment conditions for the flash lamp annealing and analyzing a recovery mechanism of the crystal defect on the basis of a result of the measurement. Consequently, the method for evaluating a semiconductor substrate which enables evaluating a recovery process of the crystal defect is provided.
TESTING OF LED DEVICES DURING PICK AND PLACE OPERATIONS
A pick and place LED testing apparatus, comprising: a test station operative in use to power a group of LEDs; a bondhead operative in use to pick said group of LEDs from a source wafer and place said group of LEDs on said test station for testing; and an optical sensor operative in use to measure an optical characteristic of said group of LEDs when tested, wherein at least a portion of said bondhead is translucent to provide an optical path from said group of LEDs to said optical sensor.
SEMICONDUCTOR SUBSTRATE PROCESSING APPARATUS AND SEMICONDUCTOR SUBSTRATE MEASURING APPARATUS USING THE SAME
A semiconductor substrate processing apparatus includes: a metastructure layer divided into a plurality of microstructures by grooves, a light-transmitting dielectric substrate that supports the plurality of microstructures and is configured to allow an electromagnetic wave to be transmitted therethrough, and a frame including an exhaust hole configured to receive gas introduced from the grooves such as to provide suction force to the semiconductor substrate, wherein each of the plurality of microstructures has a smaller width than a wavelength of the electromagnetic wave, and each of the grooves has a smaller width than the wavelength of the electromagnetic wave.
REPAIR TECHNIQUES FOR MICRO-LED DEVICES AND ARRAYS
What disclosed are structures and methods for repairing emissive display systems. Various repairing techniques embodiments in accordance with the structures and methods are provided to conquer and mitigate the defected pixels and to increase the yield and reduce the cost of emissive displays systems.
METHOD OF PERFORMING ANALYSIS OF PATTERN DEFECT, IMPRINT APPARATUS, AND ARTICLE MANUFACTURING METHOD
There is provided a method of performing an analysis of a defect in a pattern of an imprint material on a substrate that has undergone an imprint process of transferring a pattern of a mold onto the substrate. The method includes obtaining a defect distribution of the pattern on the substrate, obtaining map information indicating an arrangement of the imprint material on the substrate, and determining a type of a defect based on a relationship between a position of the defect in the defect distribution and a position of a gap in the imprint material generated in a process of spreading the imprint material by the imprint process, wherein the position of the gap is predicted based on the map information.