A semiconductor device includes a semiconductor chip made of a SiC substrate and having main electrodes on one surface and a rear surface, first and second heat sinks, respectively, disposed adjacent to the one surface and the rear surface, a terminal member interposed between the second heat sink and the semiconductor chip, and a plurality of bonding members disposed between the main electrodes, the first and second heat sinks, and the terminal member. The terminal member includes plural types of metal layers symmetrically layered in the plate thickness direction. The terminal member as a whole has a coefficient of linear expansion at least in a direction orthogonal to the plate thickness direction in a range larger than that of the semiconductor chip and smaller than that of the second heat sink.

A semiconductor device includes a metal member, a first semiconductor chip, a second semiconductor chip, a first solder and a second solder. A quantity of heat generated in the first semiconductor chip is greater than the second semiconductor chip. The second semiconductor chip is formed of a material having larger Young's modulus than the first semiconductor chip. The first semiconductor chip has a first metal layer connected to the metal member through a first solder at a surface facing the metal member. The second semiconductor chip has a second metal layer connected to the metal member through a second solder at a surface facing the metal member. A thickness of the second solder is greater than a maximum thickness of the first solder at least at a portion of the second solder corresponding to a part of an outer peripheral edge of the second metal layer.

A placement base (100) of a semiconductor device (90) comprises a body (10) on which the semiconductor device (90) is disposed, and a fixing unit (40) for fixing the semiconductor device (90) to the body (10). The body (10) has a supporting unit (12) and a bottom surface (11) placed in an inner periphery of the supporting unit (12) and placed lower than the supporting unit (12). A difference in height ΔH between the supporting unit (12) and the bottom surface (11) is larger than a sum (H1+H2) of a calculated or measured maximum upward warp H1 of the bottom surface (11) and a calculated or measured maximum downward warp H2 of a base of the semiconductor device (90).

Embodiments may relate to a microelectronic package that includes an integrated heat spreader (IHS) coupled with a package substrate. The microelectronic package may further include a sealant material between the package substrate and the IHS. The sealant material may be formed of a material that cures when exposed to ultraviolet (UV) wavelengths. Other embodiments may be described or claimed.

Embodiments may relate to a microelectronic package that includes an integrated heat spreader (IHS) coupled with a package substrate. The microelectronic package may further include a sealant material between the package substrate and the IHS. The sealant material may be formed of a material that cures when exposed to ultraviolet (UV) wavelengths. Other embodiments may be described or claimed.

The power conversion device includes: a main circuit having first and second wiring layers formed respectively on both surfaces of a base board, mounted parts mounted on the first and second wiring layers, and first and second GND layers formed respectively, between external- and internal-layer portions of the base board and in regions corresponding to the mounted parts each being a mounted part which forms a circuit other than a circuit having an inductance component as a lumped constant, and to the first and second wiring layers; and a cooler attached to the base board by means of fixing screws through a first through-hole created in an end portion of the board; wherein the first and second GND layers are each formed so that creepage distance is created around a second through-hole in which a lead insertion part that mutually connects the first and second wiring layers is inserted.

A heat dissipation apparatus is provided. The apparatus includes: a bracket assembly including an accommodation portion used for accommodating a heat source component, a first opening, and a second opening; a heat sink. A heat conducting protrusion is disposed on a first surface of the heat sink, and the heat conducting protrusion extends into the accommodation portion through the second opening; and guide grooves are respectively provided in two side surfaces of the heat sink, and an extension direction of the guide grooves is inclined toward the first surface in an insertion direction of the heat source component; and fastening assemblies, each including a connecting member and a pressing member, where the pressing members are disposed on two sides of the bracket assembly, one end of the connecting member is slidably assembled in a guide groove located on a same side, and the other end abuts against a pressing member.

A semiconductor device includes a cooling base board and an insulated circuit substrate. On a front surface of an insulated board on the insulated circuit substrate, a high potential circuit pattern on which a semiconductor chip is mounted, an intermediate potential circuit pattern on which a semiconductor chip is mounted, a low potential circuit pattern, and a control circuit pattern are disposed so as to straddle a center line of the cooling base board. The intermediate potential circuit pattern includes a second chip mounting region, an output wiring connection region and an interconnect wiring region that form a U-shaped portion in which the high potential circuit pattern having a semiconductor chip thereon is disposed. The control circuit pattern is disposed so as to straddle the center line and faces the opening of the U-shaped portion.

A semiconductor device includes a cooling base board and an insulated circuit substrate. On a front surface of an insulated board on the insulated circuit substrate, a high potential circuit pattern on which a semiconductor chip is mounted, an intermediate potential circuit pattern on which a semiconductor chip is mounted, a low potential circuit pattern, and a control circuit pattern are disposed so as to straddle a center line of the cooling base board. The intermediate potential circuit pattern includes a second chip mounting region, an output wiring connection region and an interconnect wiring region that form a U-shaped portion in which the high potential circuit pattern having a semiconductor chip thereon is disposed. The control circuit pattern is disposed so as to straddle the center line and faces the opening of the U-shaped portion.

A semiconductor package includes a first semiconductor chip mounted on the package substrate, a second semiconductor mounted on the package substrate and set apart from the first semiconductor chip in a horizontal direction thereby forming a gap between the first semiconductor chip and the second semiconductor chip. The semiconductor package further includes a first thermal interface material layer formed in the gap and having a first modulus of elasticity and a second thermal interface material layer formed on each of the first semiconductor chip and the second semiconductor chip and having a second modulus of elasticity, wherein the first modulus of elasticity is less than the second modulus of elasticity.