Methods, systems, apparatus, and articles of manufacture to control load distribution of integrated circuit packages are disclosed. An example apparatus includes a carrier plate including a first surface to face a heatsink; a second surface opposite the first surface, and an aperture extending between the first and second surfaces, the aperture dimensioned to surround a semiconductor device, and a spring carried by the carrier plate, the spring to contact a surface of the semiconductor device proximate an outer edge of the semiconductor device.

Semiconductor three-dimensional integrated circuit packages and methods of forming the same are disclosed herein. A method includes bonding a semiconductor chip package to a substrate and depositing a thermal interface material on the semiconductor chip package. A thermal lid may be placed over and adhered to the semiconductor chip package by the thermal interface material. The thermal lid includes a wedge feature interfacing the thermal interface material. The thermal lid may be adhered to the semiconductor chip package by curing the thermal interface material.

According to an aspect of the disclosure, an example microelectronic device assembly includes a substrate, a microelectronic element electrically connected to the substrate, a stiffener element overlying the substrate, and a heat distribution device overlying the rear surface of the microelectronic element. The stiffener element may extend around the microelectronic element. The stiffener element may include a first material that has a first coefficient of thermal expansion (“CTE”). A surface of the stiffener element may face toward the heat distribution device. The heat distribution device may include a second material that has a second CTE. The first material may be different than the second material. The first CTE of the first material of the stiffener element may be greater than the second CTE of the second material of the heat distribution device.

Provided are a package structure and a method of forming the same. The package structure includes a first die, a second die group, an interposer, an underfill layer, a thermal interface material (TIM), and an adhesive pattern. The first die and the second die group are disposed side by side on the interposer. The underfill layer is disposed between the first die and the second die group. The adhesive pattern at least overlay the underfill layer between the first die and the second die group. The TIM has a bottom surface being in direct contact with the first die, the second die group, and the adhesive pattern. The adhesive pattern separates the underfill layer from the TIM.

Provided are a package structure and a method of forming the same. The package structure includes a first die, a second die group, an interposer, an underfill layer, a thermal interface material (TIM), and an adhesive pattern. The first die and the second die group are disposed side by side on the interposer. The underfill layer is disposed between the first die and the second die group. The adhesive pattern at least overlay the underfill layer between the first die and the second die group. The TIM has a bottom surface being in direct contact with the first die, the second die group, and the adhesive pattern. The adhesive pattern separates the underfill layer from the TIM.

A cooling system and method for using the cooling system are described. The cooling system includes a plurality of individual piezoelectric cooling elements spatially arranged in an array extending in at least two dimensions, a communications interface and driving circuitry. The communications interface is associated with the individual piezoelectric cooling elements such that selected individual piezoelectric cooling elements within the array can be activated based at least in part on heat energy generated in the vicinity of the selected individual piezoelectric cooling elements. The driving circuitry is associated with the individual piezoelectric cooling elements and is configured to drive the selected individual piezoelectric cooling elements.

A cooling system and method for using the cooling system are described. The cooling system includes a plurality of individual piezoelectric cooling elements spatially arranged in an array extending in at least two dimensions, a communications interface and driving circuitry. The communications interface is associated with the individual piezoelectric cooling elements such that selected individual piezoelectric cooling elements within the array can be activated based at least in part on heat energy generated in the vicinity of the selected individual piezoelectric cooling elements. The driving circuitry is associated with the individual piezoelectric cooling elements and is configured to drive the selected individual piezoelectric cooling elements.

Provided are a method of manufacturing a diamond-graphene hybrid heat spreader-thermal interface material assembled thermal management material including: (a) preparing a planar diamond base material; and (b) converting a predetermined thickness of at least a partial area of one side or both sides of the diamond base material into vertical graphene, wherein the diamond base material serves as a heat spreader, and a graphene layer formed on the diamond base material serves as a thermal interface material (TIM) or a heat sink, and a method of modulating the diamond-graphene hybrid thermal management material including modulating the thermal management material by attaching a heterogenous member to the surface of the diamond-graphene hybrid thermal management material and pressurizing the attached structure.

A method of forming a semiconductor structure includes: attaching a semiconductor device to a first surface of a substrate; placing a thermal interface material (TIM) film over a first side of the semiconductor device distal from the substrate, where the TIM film is pre-formed before the placing, where after the placing, a peripheral portion of the TIM film extends laterally beyond sidewalls of the semiconductor device; and attaching a lid to the first surface of the substrate to form an enclosed space between the lid and the substrate, where after attaching the lid, the semiconductor device and the TIM film are disposed in the enclosed space, where a first side of the TIM film distal from the substrate contacts the lid.

A semiconductor device includes a substrate, a package structure, a thermal interface material (TIM) structure, and a lid structure. The package structure is disposed on the substrate. The TIM structure is disposed on the package structure. The TIM structure includes a metallic TIM layer and a non-metallic TIM layer in contact with the metallic TIM layer, and the non-metallic TIM layer surrounds the metallic TIM layer. The lid structure is disposed on the substrate and the TIM structure.