A circuit board module includes a first circuit board having a first main surface on which an electronic component that generates heat when the electronic component operates is mounted and a second main surface, a second circuit board having a third main surface on which the first circuit board is mounted and a fourth main surface, and a first thermally-conductive sheet between the first circuit board and the second circuit board. The first circuit board is mounted such that the second main surface faces the third main surface. The first circuit board includes thermally-conductive vias that extend between the first and second main surfaces, the vias being densely distributed in a region near a mounting terminal of the electronic component, filled with a thermally-conductive member, and physically in contact with the first thermally-conductive sheet that covers the third main surface of the second circuit board.

Semiconductor device includes circuit substrate, first semiconductor die, thermal interface material, package lid. First semiconductor die is disposed on and electrically connected to circuit substrate. Thermal interface material is disposed on first semiconductor die at opposite side of first semiconductor die with respect to circuit substrate. Package lid extends over first semiconductor die and is bonded to the circuit substrate. Package lid includes roof, footing, and island. Roof extends along first direction and second direction perpendicular to first direction. Footing is disposed at peripheral edge of roof and protrudes from roof towards circuit substrate along third direction perpendicular to first direction and second direction. Island protrudes from roof towards circuit substrate and contacts thermal interface material on first semiconductor die. Island is disconnected from footing along second direction.

A package assembly includes an interposer module on a package substrate, a thermal interface material (TIM) film on the interposer module, and a package lid that includes a plate portion on the TIM film and a step region projecting away from the plate portion and located over the TIM film and over an edge region of the interposer module.

A method of manufacturing a semiconductor package includes mounting a first semiconductor chip and a second semiconductor chip on a substrate, forming a first film on a top surface of the first semiconductor chip, and loading the first semiconductor chip and the second semiconductor chip mounted on the substrate between a lower mold frame and an upper mold frame. The method further includes providing a molding material between the lower mold frame and the upper mold frame, removing the lower mold frame and the upper mold frame, and removing the first film on the top surface of the first semiconductor chip to expose the top surface of the first semiconductor chip.

A method of manufacturing a semiconductor package includes mounting a first semiconductor chip and a second semiconductor chip on a substrate, forming a first film on a top surface of the first semiconductor chip, and loading the first semiconductor chip and the second semiconductor chip mounted on the substrate between a lower mold frame and an upper mold frame. The method further includes providing a molding material between the lower mold frame and the upper mold frame, removing the lower mold frame and the upper mold frame, and removing the first film on the top surface of the first semiconductor chip to expose the top surface of the first semiconductor chip.

A semiconductor package includes a package substrate; semiconductor devices disposed on the package substrate; a package ring disposed on a perimeter of the package substrate surrounding the semiconductor devices; a cover including silicon bonded to the package ring and covering the semiconductor devices; and a thermal interface structure (TIS) thermally connecting the semiconductor devices to the cover.

A package structure includes a semiconductor device and an adhesive pattern. The adhesive pattern surrounds the semiconductor device, wherein an angle θ is formed between a sidewall of the semiconductor device and a sidewall of the adhesive pattern, 0°<θ<90° wherein the adhesive layer has a first opening misaligned with a corner of the semiconductor device closest to the first opening.

A semiconductor device includes: an insulating substrate; a semiconductor chip; a base plate; a first heat dissipating material; and a case. The semiconductor chip and a sealing material for sealing the semiconductor chip are housed in the case. The insulating substrate includes an insulating layer and a conductor pattern provided on an upper surface of the insulating layer. The semiconductor chip is joined onto the conductor pattern by a joining material. A lower surface of the insulating substrate and an upper surface of the base plate are in contact with each other with interposition of the first heat dissipating material. The insulating substrate and the base plate are not fixed to each other.

A semiconductor device includes: an insulating substrate; a semiconductor chip; a base plate; a first heat dissipating material; and a case. The semiconductor chip and a sealing material for sealing the semiconductor chip are housed in the case. The insulating substrate includes an insulating layer and a conductor pattern provided on an upper surface of the insulating layer. The semiconductor chip is joined onto the conductor pattern by a joining material. A lower surface of the insulating substrate and an upper surface of the base plate are in contact with each other with interposition of the first heat dissipating material. The insulating substrate and the base plate are not fixed to each other.

Embodiments include an electronic system and methods of forming an electronic system. In an embodiment, the electronic system may include a package substrate and a die coupled to the package substrate. In an embodiment, the electronic system may also include an integrated heat spreader (IHS) that is coupled to the package substrate. In an embodiment the electronic system may further comprise a thermal interface pad between the IHS and the die. In an embodiment the die is thermally coupled to the IHS by a liquid metal thermal interface material (TIM) that contacts the thermal interface pad.