A method for manufacturing a fin-integrated semiconductor module includes: clamping a fin-integrated heat-dissipation base using a level different jig while making the heat-dissipation base vary in height; and soldering a semiconductor assembly onto the heat-dissipation base. A semiconductor module includes a fin-integrated heat-dissipation base and a semiconductor assembly provided on the heat-dissipation base. A bending width of the heat-dissipation base is 200 μm or less.

A method for manufacturing a fin-integrated semiconductor module includes: clamping a fin-integrated heat-dissipation base using a level different jig while making the heat-dissipation base vary in height; and soldering a semiconductor assembly onto the heat-dissipation base. A semiconductor module includes a fin-integrated heat-dissipation base and a semiconductor assembly provided on the heat-dissipation base. A bending width of the heat-dissipation base is 200 μm or less.

A 3D integrated circuit device can include a substrate, a thermal interface layer and at least one die, at least one device layer bonded between the thermal interface layer and the at least one die, wherein the thermal interface layer enhances conductive heat transfer between the at least one device layer and the at least one die, and a heat sink located adjacent to a heat spreader, wherein the thermal interface layer, the at least one die and the at least one device layer are located between the heat spreader and the substrate.

A 3D integrated circuit device can include a substrate, a thermal interface layer and at least one die, at least one device layer bonded between the thermal interface layer and the at least one die, wherein the thermal interface layer enhances conductive heat transfer between the at least one device layer and the at least one die, and a heat sink located adjacent to a heat spreader, wherein the thermal interface layer, the at least one die and the at least one device layer are located between the heat spreader and the substrate.

Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate having a surface; a die having a first surface and an opposing second surface, wherein the first surface of the die is coupled to the surface of the package substrate; and a cooling apparatus that may include a conductive base having a first surface and an opposing second surface, wherein the first surface of the conductive base is in thermal contact with the second surface of the die, and a plurality of conductive structures on the second surface of the conductive base, wherein an individual conductive structure of the plurality of conductive structures has a width between 10 microns and 100 microns.

Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate having a surface; a die having a first surface and an opposing second surface, wherein the first surface of the die is coupled to the surface of the package substrate; and a cooling apparatus that may include a conductive base having a first surface and an opposing second surface, wherein the first surface of the conductive base is in thermal contact with the second surface of the die, and a plurality of conductive structures on the second surface of the conductive base, wherein an individual conductive structure of the plurality of conductive structures has a width between 10 microns and 100 microns.

A semiconductor module includes a semiconductor device, and a cooling device. The semiconductor device includes a semiconductor chip and a circuit board for mounting the chip. The cooling device includes a top plate mounted in the semiconductor device and having a side wall connected thereto, a bottom plate connected to the side wall, and a refrigerant circulating portion, defined by the top plate, the side wall, and the bottom plate and has a substantially rectangular shape with a cross section parallel to a main surface of the top plate having long and short sides. The circuit board is a substantially rectangular laminated circuit board including an insulating plate having an upper surface with a circuit layer and a lower surface with a metal layer. In a plan view, at least one corner of the metal layer at least partially overlaps with the slope portion of the side wall.

A semiconductor module includes a semiconductor device, and a cooling device. The semiconductor device includes a semiconductor chip and a circuit board for mounting the chip. The cooling device includes a top plate mounted in the semiconductor device and having a side wall connected thereto, a bottom plate connected to the side wall, and a refrigerant circulating portion, defined by the top plate, the side wall, and the bottom plate and has a substantially rectangular shape with a cross section parallel to a main surface of the top plate having long and short sides. The circuit board is a substantially rectangular laminated circuit board including an insulating plate having an upper surface with a circuit layer and a lower surface with a metal layer. In a plan view, at least one corner of the metal layer at least partially overlaps with the slope portion of the side wall.

The present invention relates to a method for fabricating an integrated electronic device with a microchannel, comprising the steps of: —Providing a homogeneous or heterogeneous substrate with one or more layers of material, respectively; —Forming at least one trench in the upper surface and through the upper layer using an etching process, particularly using a high aspect ratio etching process; —Sealing the trench by closing the opening of the trench on an upper surface of the upper layer.

A cyclic cooling embedded packaging substrate and a manufacturing method thereof are disclosed. The packaging substrate includes a dielectric material body, a chip, a first metal face, a second metal face and a first trace. The dielectric material body is provided with a packaging cavity, the chip is packaged in the packaging cavity, the first metal face is embedded in the dielectric material body, covers and is connected to a heat dissipation face of the chip. The second metal face is embedded in the dielectric material body, connected to a surface of the first metal face, and is provided with a first cooling channel pattern for forming a cooling channel. The first trace is arranged on a surface of the dielectric material body or embedded therein, and is connected with a corresponding terminal on an active face of the chip through a first conductive structure.