A power module that includes a semiconductor chip configured to generate heat, a metal layer electrically connected to the semiconductor chip to allow current to flow therethrough, a cooling channel facing the metal layer for dissipating heat out of the semiconductor chip, and a resin layer interposed between the metal layer and the cooling channel and integrally formed in an internal space of the power module.

Disclosed is a semiconductor packaging. The semiconductor packing comprises a substrate on which a semiconductor device is arranged on a front surface; a channel member disposed on a rear surface of the substrate and forming a cooling flow path through which a refrigerant moves; and a porous diamond layer covering an outer surface of the channel member.

Disclosed is a semiconductor packaging. The semiconductor packing comprises a substrate on which a semiconductor device is arranged on a front surface; a channel member disposed on a rear surface of the substrate and forming a cooling flow path through which a refrigerant moves; and a porous diamond layer covering an outer surface of the channel member.

A thermal management plate includes two cooling devices. A first cooling device includes a fluid inlet, a fluid outlet, a distribution manifold, and a number of fluid channels extending from the distribution manifold. The second cooling device also includes a fluid inlet, a fluid outlet, a distribution manifold, and a number of fluid channels extending from the distribution manifold. The channels of the first cooling device and the channels of the second cooling device are in thermal communication with one another, and the two channels are designed jointly.

An electronic device includes a substrate which is provided in a housing and on which a heat generating member is mounted, a cooling member configured to cool the heat generating member, a first tube including one end connected to the cooling member and configured to supply a cooling medium to the cooling member or discharge the cooling medium from the cooling member, a joint member including a first connection portion extending in a tube axial direction of the first tube and connected to another end of the first tube, a support member fixed to the housing or the substrate, and a tube fixing portion configured to fix the first tube to the support member.

Methods and apparatus for providing an assembly including a base substrate, a lid substrate, and a ring frame between the base substrate and the lid substrate to define a protected volume, where the ring frame includes through vias. A die may be contained in the protected volume. Sensor circuitry can include conductive pillars in the protected volume and the die can include circuity to determine an impedance of the pad and the pillars for tamper detection. An edge cap can be coupled to at least one side of the assembly for tamper detection.

Methods and apparatus for providing an assembly including a base substrate, a lid substrate, and a ring frame between the base substrate and the lid substrate to define a protected volume, where the ring frame includes through vias. A die may be contained in the protected volume. Sensor circuitry can include conductive pillars in the protected volume and the die can include circuity to determine an impedance of the pad and the pillars for tamper detection. An edge cap can be coupled to at least one side of the assembly for tamper detection.

A 2-in-1 power electronics assembly includes a frame with a lower dielectric layer, an upper dielectric layer spaced apart from the lower dielectric layer, and a sidewall disposed between and coupled to the lower dielectric layer and the upper dielectric layer. The lower dielectric layer includes a lower cooling fluid inlet and the upper dielectric layer includes an upper cooling fluid outlet. A first semiconductor device assembly and a second semiconductor device assembly are included and disposed within the frame. The first semiconductor device is disposed between a first lower metal inverse opal (MIO) layer and a first upper MIO layer, and the second semiconductor device is disposed between a second lower MIO layer and a second upper MIO layer. An internal cooling structure that includes the MIO layers provides double sided cooling for the first semiconductor device and the second semiconductor device.

A 2-in-1 power electronics assembly includes a frame with a lower dielectric layer, an upper dielectric layer spaced apart from the lower dielectric layer, and a sidewall disposed between and coupled to the lower dielectric layer and the upper dielectric layer. The lower dielectric layer includes a lower cooling fluid inlet and the upper dielectric layer includes an upper cooling fluid outlet. A first semiconductor device assembly and a second semiconductor device assembly are included and disposed within the frame. The first semiconductor device is disposed between a first lower metal inverse opal (MIO) layer and a first upper MIO layer, and the second semiconductor device is disposed between a second lower MIO layer and a second upper MIO layer. An internal cooling structure that includes the MIO layers provides double sided cooling for the first semiconductor device and the second semiconductor device.

A problem is that close contact with a heat dissipation surface of a power semiconductor device is not sufficient, and thus heat dissipation performance is low. A thermally conductive layer 5 abuts on a heat dissipation surface 4a of a circuit body 100, and a heat dissipation member 7 abuts on the outside of the thermally conductive layer 5, which is a side of the heat dissipation surface 4a of the circuit body 100. A fixing member 8 abuts on a side of the circuit body 100 opposite to the heat dissipation surface 4a. A connection member 9 is penetrated at the respective end portions of the heat dissipation member 7 and the fixing member 8. FIG. 3 illustrates a state before a bolt and a nut of the connection member 9 are tightened. The heat dissipation member 7 holds a curved shape such that the central portion of the heat dissipation member 7 protrudes toward the circuit body 100. The bolt and the nut of the connection member 9 are fastened and fixed at both ends of the heat dissipation member 7 and the fixing member 8 so as to sandwich the circuit body 100. The heat dissipation member 7 is elastically deformed to bring the heat dissipation member 7 into close contact with the heat dissipation surface 4a of the circuit body 100 via the thermally conductive layer 5, and surface pressure is applied from the heat dissipation member 7 to the heat dissipation surface 4a.