H01L24/42

LOW STRESS LASER MODIFIED MOLD CAP PACKAGE
20230207410 · 2023-06-29 ·

An electronic device includes a semiconductor die, a bond wire coupled to a side of the semiconductor die, and a package structure that encloses the semiconductor die and the bond wire. The package structure has a package side with a recess that extends inward from the package side toward the side of the semiconductor die. The recess has a bottom that is spaced apart from the side of the semiconductor die, and the bottom is spaced apart from the bond wire.

Voltage generators with charge pumps for switch circuits

Disclosed herein are non-limiting examples of voltage generators that use multiple charge pumps coupled in series to generate a targeted voltage. The charge pumps implement multiple charge pump units that reduce the introduction of noise into a circuit in which they are implemented. The charge pumps units work in parallel on different clock phases to reduce spurious noise. This is in contrast to using a single charge pump with a relatively large flying capacitor or a plurality of charge pumps in series. This can, for example, reduce spurious signals or spurs that arise due at least in part to the characteristics of the clock signal. The disclosed technologies may be particularly advantageous for SOI-based components and circuits.

Electronic device

An electronic device includes: a substrate; a first electronic component that is mounted on a first surface of the substrate; a cap that accommodates the first electronic component between the cap and the substrate; and a mold portion that bonds the cap and the substrate. The cap includes a base portion having a recess that opens to a substrate side and accommodates the first electronic component, and a flange portion that protrudes from an end portion of the base portion on the substrate side to an outer peripheral side and is in contact with the first surface. The mold portion is provided from a second surface side of the substrate to a first surface side while bypassing a side, and bonds the cap and the substrate by molding the flange portion in a portion on the first surface side.

POWER CONVERTER MODULE

A power converter module includes power transistors and a substrate having a first surface and a second surface that opposes the first surface. A thermal pad is situated on the second surface of the substrate, and the thermal pad is configured to be thermally coupled to a heat sink. The power converter module also includes a control module mounted on a first surface of the substrate. The control module also includes control IC chips coupled to the power transistors. A first control IC chip controls a first switching level of the power converter module and a second control IC chip controls a second switching level of the power converter module. Shielding planes overlay the substrate. A first shielding plane is situated between the thermal pad and the first control IC chip and a second shielding plane is situated between the thermal pad and a second control IC chip.

CHIP PACKAGE AND METHOD OF FORMING A CHIP PACKAGE

A chip package includes a chip with at least one contact pad, a contact structure formed from at least one continuous longitudinally extended electrically conductive element by attaching the conductive element to the contact pad in at least three contact positions, wherein the conductive element bends away from the contact pad between pairs of consecutive contact positions, and an encapsulation partially encapsulating the contact structure, wherein the encapsulation includes an outer surface facing away from the chip, and wherein the contact structure is partially exposed at the outer surface.

POWER SEMICONDUCTOR MODULE COMPRISING A SUBSTRATE, POWER SEMICONDUCTOR COMPONENTS AND COMPRISING A PRESSURE BODY

A power semiconductor module has a substrate and an insulation layer and a metal layer arranged on the insulation layer, forming conductor tracks, comprising power semiconductor components arranged on the metal layer and conductively contacted with the metal layer. A pressure device arranged above the substrate in the normal direction of the insulation layer and having a pressure body and pressure elements running toward the substrate. The pressure elements each being connected to the pressure body to move resiliently in the normal direction via a spring element. The pressure body exerting a pressure onto the pressure elements in the direction toward the substrate via the spring elements, the pressure elements being arranged in such a way that, owing to the pressure exerted by the pressure body, they press onto power semiconductor component surrounding regions, surrounding the power semiconductor components, of the substrate.

SEMICONDUCTOR APPARATUS
20230197886 · 2023-06-22 ·

Provided is a semiconductor apparatus including a substrate, a semiconductor chip, a connection material, a bonding wire, and a partition, in which the semiconductor chip is arranged on the substrate through the connection material, the bonding wire includes a first end and a second end and is connected to the semiconductor chip at the first end and connected to the substrate at the second end, and the partition is arranged on the substrate, at a position between the semiconductor chip and the second end in plan view.

RADIO FREQUENCY PACKAGES CONTAINING SUBSTRATES WITH COEFFICIENT OF THERMAL EXPANSION MATCHED MOUNT PADS AND ASSOCIATED FABRICATION METHODS

Radio frequency (RF) packages containing substrates having coefficient of thermal expansion (CTE) matched mount pads are disclosed, as are methods for fabricating RF packages and substrates. In embodiments, the RF package contains a high thermal performance substrate including a metallic base structure, which has a frontside facing a first RF power die and a first die attach region on the frontside of the base structure. A first CTE matched mount pad is bonded to the metallic base structure and covers the first die attach region. The first CTE mount pad has a CTE greater than the CTE of RF power die and less than the CTE of the metallic base structure. An electrically-conductive bonding material attaches the RF power die to the first CTE matched mount pad, while RF circuitry integrated into first RF power die is electrically coupled to the metallic base structure through the mount pad.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
20230187311 · 2023-06-15 · ·

A semiconductor module includes a conductor layer, an insulating plate, a circuit pattern layer, and semiconductor chips disposed in this order. The conductor layer has a first through hole. The insulating plate has a second through hole having an opening size larger than the first through hole at a location facing the first through hole. The circuit pattern layer has an opening having an opening size larger than the second through hole at a location facing the second through hole. When the semiconductor module is connected to a cooling member, heat transfer medium is disposed between the conductor layer and the cooling member. A screw member is inserted into the opening and second and first through holes and screwed into a screw attachment hole. The screw member presses an area around the first through hole inside the second through hole toward the cooling member.

DOUBLE-SIDED PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF

A manufacturing method of a double-sided package structure includes securing at least two discrete double-sided mount structures to a first side of a master at intervals; molding the first side of the master to form a molded body encasing the at least two discrete double-sided mount structures; removing the master; and splitting the molded body to obtain individual double-sided package structures.