A chip package structure, comprises a first chip having a plurality of first chip joints at a lower side thereof; a circuit board below the first chip; an upper side of the circuit board being arranged with a plurality of circuit board joints; in packaging, the first chip joints being combined with the circuit board joints of the circuit board so that the first chip is combined to the circuit board by a way of ACF combination or convex joint combination; and wherein in the ACF combination, ACFs are used as welding points to be combined to the pads at another end so that the chip is combined to the circuit board; and wherein in the convex pad combination, a convex pad is combined with a flat pad by chemically methods or physical methods; and these pads are arranged on the circuit board and the first chip.

A method of manufacturing an augmented LED array assembly is described which comprises providing an LED array assembly configured for inclusion in an LED lighting circuit, the LED array assembly comprising a micro-LED array mounted onto a driver integrated circuit, the driver integrated circuit comprising contact pads configured for electrical connections to a circuit board assembly; providing an essentially planar carrier comprising a plurality of contact bridges, each contact bridge extending between a first contact pad and a second contact pad; and mounting the contact bridge carrier to the LED array assembly by forming solder bonds between the first contact pads of the contact bridge carrier and the contact pads of the driver integrated circuit.

In general aspect, a semiconductor device package can include a substrate and a semiconductor die disposed on and coupled with the substrate. The semiconductor device package can further include a leadframe having an indentation defined therein, at least a portion of the indentation being disposed on and coupled with the semiconductor die via a conductive adhesive.

A chip package structure, comprises a first chip having a plurality of first chip joints at a lower side thereof; a circuit board below the first chip; an upper side of the circuit board being arranged with a plurality of circuit board joints; in packaging, the first chip joints being combined with the circuit board joints of the circuit board so that the first chip is combined to the circuit board by a way of ACF combination or convex joint combination; and wherein in the ACF combination, ACFs are used as welding points to be combined to the pads at another end so that the chip is combined to the circuit board; and wherein in the convex pad combination, a convex pad is combined with a flat pad by chemically methods or physical methods; and these pads are arranged on the circuit board and the first chip.

An apparatus is provided which comprises: a first die having at least one bond pad; a first flexible layer comprising an anisotropic conductive material, wherein the first flexible layer is adjacent to the at least one bond pad such that it makes an electrical contact with the at least one bond pad; and a second flexible layer comprising a conductive metal, wherein the second flexible layer is adjacent to the first flexible layer.

This thermocompression bonding device is provided with a heating tool (1) and a backup member (3). The backup member (3) has: a support portion (3a) which faces the tip (1a) of the heating tool (1) while first and second members (111, 122) to be joined and a cushioning member (2) are located therebetween, and which supports the first and second members (111, 122) to be joined; and a body portion (3b) provided on the opposite side of the support portion (3a) from the first and second members (111, 122) to be joined. The support portion (3a) is formed so that the heat conductivity thereof is lower than that of the body portion (3b).

A chip package structure, comprises a first chip having a plurality of first chip joints at a lower side thereof; a circuit board below the first chip; an upper side of the circuit board being arranged with a plurality of circuit board joints; in packaging, the first chip joints being combined with the circuit board joints of the circuit board so that the first chip is combined to the circuit board by a way of ACF combination or convex joint combination; and wherein in the ACF combination, ACFs are used as welding points to be combined to the pads at another end so that the chip is combined to the circuit board; and wherein in the convex pad combination, a convex pad is combined with a flat pad by chemically methods or physical methods; and these pads are arranged on the circuit board and the first chip.

A method of attaching one or more active devices on one or more substrates to a metal carrier by hot stamping is disclosed. The method includes contacting the active device(s) on the substrate(s) with the metal carrier, and applying pressure to and heating the active device(s) on the substrate(s) and the metal carrier sufficiently to affix or attach the active device(s) on the substrate(s) to the metal carrier. The active device(s) may include an integrated circuit. The substrate(s) may include a metal substrate on the backside of the active device and a protective/carrier film on the frontside of the active device. The protective/carrier film may be or include an organic polymer. The metal carrier may be or include a metal foil. Various examples of the method further include thinning the metal substrate, dicing the active device(s) and a continuous substrate, and/or separating the active devices.

A chip package structure, comprises a first chip having a plurality of first chip joints at a lower side thereof; a circuit board below the first chip; an upper side of the circuit board being arranged with a plurality of circuit board joints; in packaging, the first chip joints being combined with the circuit board joints of the circuit board so that the first chip is combined to the circuit board by a way of ACF combination or convex joint combination; and wherein in the ACF combination, ACFs are used as welding points to be combined to the pads at another end so that the chip is combined to the circuit board; and wherein in the convex pad combination, a convex pad is combined with a flat pad by chemically methods or physical methods; and these pads are arranged on the circuit board and the first chip.

A power electronics method and assembly produced by the method. The assembly has a substrate, having a power semiconductor element, and an adhesion layer disposed therebetween, wherein the substrate has a first surface that faces a power semiconductor element, a power semiconductor element has a third surface that faces the substrate, the adhesion layer has a second surface which, preferably across the full area, contacts the third surface and has a first consistent surface contour having a first roughness, and wherein a fourth surface of the power semiconductor element that is opposite the third surface has a second surface contour having a second roughness, said second surface contour following the first surface contour.