The invention aims for a polarisation circuit of a power component comprising a capacitive dividing bridge and a resistive dividing bridge formed on the same substrate as the component. An additional electrode 1 in the front face 100 of the substrate makes it possible to adjust one of the capacitance values of the capacitive dividing bridge according to the other of the capacitance values coming from one of the electrodes of the power component. The sizing of this additional electrode furthermore makes it possible to obtain a leakage resistance contributing to the resistive dividing bridge.

Alternatively, two additional resistances R, R formed in the front face of the substrate making it possible to obtain the resistive dividing bridge independently of the capacitive dividing bridge.

In an electrical circuit arrangement, which is formed by an RC-snubber element monolithically integrated into a semiconductor substrate, a first capacitor and a resistor of the RC-snubber element are vertically formed in a semiconductor region of a first type of doping of the semiconductor substrate. At least one further capacitor is connected in series with the first capacitor. The further capacitor is integrated laterally with the first capacitor in a semiconductor region of a second type of doping, which adjoins the semiconductor region of the first type of doping, and by virtue of the different type of doping electrically insulates the further capacitor from the semiconductor region of the first type of doping. This circuit arrangement forms a low inductance RC-snubber element with high dielectric strength, which has high heat dissipation and integration density.

A display device includes a light-emitting unit and a light conversion layer disposed on the light-emitting unit. The light conversion layer includes plural quantum dot portions and a first shielding portion surrounding the plural quantum dot portions. One of the plural quantum dot portions has a surface, and at least a part of the surface is a curved surface. A first thickness of the first shielding portion is greater than a maximum thickness of one of the plural quantum dot portions.

A semiconductor apparatus having a silicon substrate layer at least portion of which is doped with dopants of a conductivity type; and at least one insulator layer formed above the silicon substrate layer, wherein the at least one insulator layer and the dopants of the silicon substrate layer have opposite electric charges.

A distributed LC filter structure is disclosed. The distributed LC filter structure provides simultaneously a distributed inductance and a distributed capacitance in the same structure. Accordingly, discrete passive elements are eliminated and high, homogenous integration is achieved. Interconnections between the distributed inductance and the distributed capacitance are tailored to leverage a parasitic inductance of the distributed capacitance to increase the overall inductance of the distributed LC filter structure. Similarly, the interconnections are tailored to leverage a parasitic capacitance resulting from the distributed inductance to add up with the distributed capacitance augmenting the overall capacitance of the structure.

The present invention generally comprises a semiconductor film and the reactive sputtering process used to deposit the semiconductor film. The sputtering target may comprise pure zinc (i.e., 99.995 atomic percent or greater), which may be doped with aluminum (about 1 atomic percent to about 20 atomic percent) or other doping metals. The zinc target may be reactively sputtered by introducing nitrogen and oxygen to the chamber. The amount of nitrogen may be significantly greater than the amount of oxygen and argon gas. The amount of oxygen may be based upon a turning point of the film structure, the film transmittance, a DC voltage change, or the film conductivity based upon measurements obtained from deposition without the nitrogen containing gas. The reactive sputtering may occur at temperatures from about room temperature up to several hundred degrees Celsius. After deposition, the semiconductor film may be annealed to further improve the film mobility.

A resistor-capacitor (RC) delay circuit includes a first capacitor at a first level, a resistor at a second level and a second capacitor at a third level. The second capacitor is electrically connected in parallel with the first capacitor. The second capacitor has a footprint within a footprint of the first capacitor. The resistor is coupled in shunt with the first capacitor and the second capacitor.

A recess in a die backside surface occupies a footprint that accommodates an inductor coil that is formed in metallization above an active surface of the die. Less semiconductive material is therefore close to the inductor coil. A ferromagnetic material is formed in the recess, or a ferromagnetic material is formed on a dielectric layer above the inductor coil. The recess may extend across a die that allows the die to be deflected at the recess.

An integrated circuit structure comprises at least one metal gate formed in a first dielectric layer, the at least one metal gate comprising a workfunction layer and the gate oxide layer along sidewalls of the first dielectric layer. A field effect (FE) dielectric layer dielectric layer is above the first dielectric layer of the at least one metal gate. A precision resistor comprising a thin-film metallic material is formed on the FE dielectric layer above the at least one metal gate and extending laterally over the at least one metal gate.

A semiconductor structure is disclosed. The semiconductor structure includes back end layers that include a first metallization layer, a second metallization layer, and a scalable resistor between the first metallization layer and the second metallization layer. The semiconductor structure also includes front end layers.