A ferroelectric device structure includes an array of ferroelectric capacitors overlying a substrate, first metal interconnect structures electrically connecting each of first electrodes of the array of ferroelectric capacitors to a first metal pad embedded in a dielectric material layer, and second metal interconnect structures electrically connecting each of the second electrodes of the array of ferroelectric capacitors to a second metal pad embedded in the dielectric material layer. The second metal pad may be vertically spaced from the substrate by a same vertical separation distance as the first metal pad is from the substrate. First metal lines laterally extending along a first horizontal direction may electrically connect the first electrodes to the first metal pad, and second metal lines laterally extending along the first horizontal direction may electrically connect each of the second electrodes to the second metal pad.

To provide a thin film capacitor having high adhesion performance with respect to a multilayer substrate. A thin film capacitor includes: a metal foil having a roughened upper surface; a dielectric film covering the upper surface of the metal foil and having an opening through which the metal foil is partly exposed; a first electrode layer contacting the metal foil through the opening; and a second electrode layer contacting the dielectric film without contacting the metal foil. A height of the first electrode layer is lower than a height of the second electrode layer. This enhances adhesion performance when the thin film capacitor is embedded in a multilayer substrate and improves ESR characteristics.

A method of fabricating a semiconductor device is provided. The method includes forming a first metal layer over a semiconductor substrate, and forming a first layer over the first metal layer. The first layer and first metal layer are etched to expose a sidewall of the first layer and a sidewall of the first metal layer, wherein the etching disburses a portion of the first metal layer to create an accumulation of material on at least one of the sidewall of the first layer or the sidewall of the first metal layer. At least some of the accumulation is etched away using an etchant comprising fluorine.

An electronic component, an electronic circuit, and a method for manufacturing an electronic component. An electronic component includes a substrate having first and second main surfaces facing each other and containing a silicon element; a capacitor element on the first main surface; and an inductor element on the first or second main surfaces in a direction orthogonal to the first main surface with respect to the capacitor element and electrically connected to the capacitor element. The capacitor element includes a first electrode portion extending in a direction intersecting the first main surface between the first and second main surfaces; a second electrode portion that extends in the direction intersecting the first main surface between the first and second main surfaces, and faces the first electrode portion in a direction parallel to the first main surface; and a dielectric portion between the first and second electrode portions.

Reliability of a semiconductor device is improved, An interlayer insulating film and a pair of conductive layers that separate from each other through the interlayer insulating film are formed on a semiconductor substrate SUB. In this case, a position of each upper surface of the pair of conductive layers is different from a position of an upper surface of the interlayer insulating film, and an insulating film is formed between each upper surface of the pair of conductive layers and the upper surface of the interlayer insulating film. The insulating film has an incline surface that inclines with respect to each upper surface of the pair of conductive layers and die interlayer insulating film. A resistive element is connected to each of the pair of conductive layers, and is formed along the incline surface so as to cover the insulating film.

A ferroelectric device structure includes an array of ferroelectric capacitors overlying a substrate, first metal interconnect structures electrically connecting each of first electrodes of the array of ferroelectric capacitors to a first metal pad embedded in a dielectric material layer, and second metal interconnect structures electrically connecting each of the second electrodes of the array of ferroelectric capacitors to a second metal pad embedded in the dielectric material layer. The second metal pad may be vertically spaced from the substrate by a same vertical separation distance as the first metal pad is from the substrate. First metal lines laterally extending along a first horizontal direction may electrically connect the first electrodes to the first metal pad, and second metal lines laterally extending along the first horizontal direction may electrically connect each of the second electrodes to the second metal pad.

Various embodiments of energy storage elements for use in power converters are described. In one example embodiment, briefly, an integrated circuit (IC) for use with a power converter may comprise a first layer comprising a first set of devices disposed on a device face thereof; a second layer comprising a second set of devices disposed on a device face thereof; a first interconnect structure to be disposed between the first layer and an electrical interface, the first interconnect structure to electrically couple the first set of devices to one or more thru vias; and a second interconnect structure to be disposed between the first layer and the second layer, the second interconnect structure to electrically couple the second set of devices to the one or more thru vias. Likewise, in some instances, one or more thru vias may extend through at least one of the following: the first layer; the second layer; or any combination thereof.

A ferroelectric device structure includes an array of ferroelectric capacitors overlying a substrate, first metal interconnect structures electrically connecting each of first electrodes of the array of ferroelectric capacitors to a first metal pad embedded in a dielectric material layer, and second metal interconnect structures electrically connecting each of the second electrodes of the array of ferroelectric capacitors to a second metal pad embedded in the dielectric material layer. The second metal pad may be vertically spaced from the substrate by a same vertical separation distance as the first metal pad is from the substrate. First metal lines laterally extending along a first horizontal direction may electrically connect the first electrodes to the first metal pad, and second metal lines laterally extending along the first horizontal direction may electrically connect each of the second electrodes to the second metal pad.

Methods and structures for forming arrays of LED devices are disclosed. The LED devices in accordance with embodiments of the invention may include an internally confined current injection area to reduce non-radiative recombination due to edge effects. Several manners for confining current may include etch removal of a current distribution layer, etch removal of a current distribution layer and active layer followed by mesa re-growth, isolation by ion implant or diffusion, quantum well intermixing, and oxide isolation.

A high power thin film filter is disclosed includes a substrate having a substrate thickness in a Z-direction between a first surface and a second surface. A thin film capacitor may be formed over the first surface. A thin film inductor may be spaced apart from the thin film capacitor by at least the thickness of the substrate. A via may be formed in the substrate that electrically connects the thin film capacitor and the thin film inductor. The via may include a polymeric composition.