Short-wave infrared (SWIR) focal plane arrays (FPAs) comprising a Si layer through which light detectable by the FPA reaches photodiodes of the FPA, at least one germanium (Ge) layer including a plurality of distinct photosensitive areas including at least one photosensitive area in each of a plurality of photosensitive photosites, each of the distinct photosensitive areas comprising a plurality of proximate steep structures of Ge having height of at least 0.5 μm and a height-to-width ratio of at least 2, and methods for forming same.

A photosensor including first and second conductive layers disposed on a main surface and a back surface of a substrate is provided. A conductive via layer is disposed between the conductive layers. A light emitting element and an integrated circuit (IC) including a light receiving element are mounted on the first conductive layer. The photosensor includes a translucent covering member that covers the light emitting element and the IC together with the first conductive layer. The covering member includes a groove between the light emitting element and the IC in a plan view. The first conductive layer includes a first mounting portion on which the light emitting element is mounted and a second mounting portion on which the IC is mounted. The light emitting device is electrically connected to the IC via the first mounting portion, the conductive via layer, the second conductive layer and the second mounting portion.

A photoconductor assembly includes a substrate formed of an undoped and single-crystal semiconductor material that is configured to absorb electromagnetic energy, a plurality of electrodes arranged normal to the substrate, and a power supply that applies a voltage to the electrodes for modulating the electromagnetic energy through the substrate.

An imaging device includes: a photoelectric converter including first and second electrodes, and a photoelectric conversion layer located between the first electrode and the second electrode; a voltage supply circuit applying a bias voltage between the first electrode and the second electrode; an amplifier transistor including a gate electrically connected to the second electrode, the amplifier transistor configured to output a signal corresponding to a potential of the second electrode; and a detection circuit configured to detect a level of the signal from the amplifier transistor. The voltage supply circuit applies the bias voltage in a first voltage range when the level detected by the detection circuit is greater than or equal to a first threshold value, and applies the bias voltage in a second voltage range that is greater than the first voltage range when the level detected by the detection circuit is less than a second threshold value.

Wafer alignment with restricted visual access has been disclosed. In an example, a method of processing a substrate for fabricating a solar cell involves supporting the substrate over a stage. The method involves forming a substantially opaque layer over the substrate. The substantially opaque layer at least partially covers edges of the substrate. The method involves performing fit-up of the substantially opaque layer to the substrate. The method involves illuminating the covered edges of the substrate with light transmitted through the stage, and capturing a first image of the covered edges of the substrate based on the light transmitted through the stage. The method further includes determining a first position of the substrate relative to the stage based on the first image of the covered edges. The substrate may be further processed based on the determined first position of the substrate under the substantially opaque layer.

A method of manufacturing a thin film transistor flat sensor that includes depositing a first metal film on a substrate and forming a common electrode on the substrate with one patterning process; successively depositing an insulating film and a second metal film on the substrate having the common electrode formed thereon, and forming a gate electrode by applying one pattering process to the second metal film; applying one patterning process to the deposited insulating film to form a common electrode insulating layer, wherein a first via hole is formed in the common electrode insulating layer at a location corresponding to the common electrode; depositing a transparent conductive film on the substrate having the common electrode, and forming a first conductive film layer, acting as one polar plate of a storage capacitor, on the common electrode and the gate electrode with one patterning process.

A semiconductor structure includes a substrate, a plurality of micro semiconductor devices and a fixing structure. The micro semiconductor devices are disposed on the substrate. The fixing structure is disposed between the substrate and the micro semiconductor devices. The fixing structure includes a plurality of conductive layers and a plurality of supporting layers. The conductive layers are disposed on the lower surfaces of the micro semiconductor devices. The supporting layers are connected to the conductive layers and the substrate. The material of each of the conductive layers is different from the material of each of the supporting layers.

A semiconductor device is provided, which has a wide-bandgap semiconductor element, such as a SiC element, and which includes a sensor capable of responding sufficiently to characteristic requirements for protecting and controlling the semiconductor element. The semiconductor device includes a wide-bandgap semiconductor element mounted on a substrate; and a light-receiving element that receives light emitted from the wide-bandgap semiconductor element when the wide-bandgap semiconductor element is in a conduction state.

A semiconductor device is provided, which has a wide-bandgap semiconductor element, such as a SiC element, and which includes a sensor capable of responding sufficiently to characteristic requirements for protecting and controlling the semiconductor element. The semiconductor device includes a wide-bandgap semiconductor element mounted on a substrate; and a light-receiving element that receives light emitted from the wide-bandgap semiconductor element when the wide-bandgap semiconductor element is in a conduction state.

An imaging system may include an image sensor that may be a backside illuminated (BSI) image sensor. The BSI sensor may be bonded to an inactive silicon substrate or bonded to an active silicon substrate like a digital signal processor (DSP). Through-oxide vias (TOVs) may be formed in the image sensor die. A bond pad region may be formed on a light shielding layer to facilitate coupling the light shield to a ground source or other power sources. Color filter housing structures may be formed over active image sensor pixels on the image sensor die. In-pixel grid structures may be integrated with the color filter housing structures to help reduce crosstalk. The light shielding layer may also be formed over reference image sensor pixels on the image sensor die. The TOVs, the in-pixel grid structures, and the light shielding structures may be formed simultaneously.