A backside emitter solar cell structure having a heterojunction, and a method and a device for producing the same. A backside intrinsic layer is first formed on the back side of the substrate, then a frontside intrinsic layer and a frontside doping layer are formed on the front side of the substrate, and finally a backside doping layer is formed on the back side of the substrate.

Provided are a HJT cell having high photoelectric conversion efficiency and a method for preparing the same. The HJT cell includes an N-type crystalline silicon wafer. An intrinsic amorphous silicon layer, a SiO.sub.2 layer, a C-doped SiO.sub.2 layer, a doped N-type amorphous silicon layer, a TCO conductive layer and an electrode are sequentially disposed on a front surface of the N-type crystalline silicon wafer. An intrinsic amorphous silicon layer, a SiO.sub.2 layer, a C-doped SiO.sub.2 layer, a doped P-type amorphous silicon layer, a TCO conductive layer and an electrode are sequentially disposed on a back surface of the N-type crystalline silicon wafer. The doped P-type amorphous silicon layer includes a lightly B-doped amorphous silicon layer and a heavily B-doped amorphous silicon layer.

A photosensitive device and method includes a top cell having an N-type layer, a P-type layer and a top intrinsic layer therebetween. A bottom cell includes an N-type layer, a P-type layer and a bottom intrinsic layer therebetween. The bottom intrinsic layer includes a Cu—Zn—Sn containing chalcogenide.

A photosensitive device and method includes a top cell having an N-type layer, a P-type layer and a top intrinsic layer therebetween. A bottom cell includes an N-type layer, a P-type layer and a bottom intrinsic layer therebetween. The bottom intrinsic layer includes a Cu—Zn—Sn containing chalcogenide.

A solar cell includes a support substrate, a back electrode layer on the support substrate, a light absorbing layer on the back electrode layer, a buffer layer on the light absorbing layer, a high resistance buffer layer on the buffer layer, and a front electrode layer on the high resistance buffer layer. An insulating part is located on a top surface of the light absorbing layer. A method of fabricating the solar cell includes forming the back electrode layer on the substrate, forming the light absorbing layer on the back electrode layer, forming the buffer layer on the light absorbing layer, oxidizing a top surface of the buffer layer, and forming the front electrode layer on the buffer layer.

Provided are an image sensor and a method of manufacturing method of manufacturing the image sensor. The image sensor includes a substrate, photoelectric transducers and switching elements formed in layers on the substrate in this order. Each of the photoelectric transducers includes a hydrogenated amorphous silicon layer. Each of the switching elements includes an amorphous oxide semiconductor layer. The image sensor further includes a blocking layer arranged between the hydrogenated amorphous silicon layers of the photoelectric transducers and the amorphous oxide semiconductor layers of the switching elements, where the blocking layer suppresses penetration of hydrogen separated from the hydrogenated amorphous silicon layers.

Provided is a solar cell and a method for manufacturing the same, the method includes: forming a doped layer on a surface of a semiconductor substrate, the doped layer having a first doping concentration of a doping element in the doped layer; depositing, on a surface of the doped layer, a doped amorphous silicon layer including the doping element; selectively removing at least one region of the doped amorphous silicon layer; performing annealing treatment, for the semiconductor substrate to form a lightly doped region having the first doping concentration and a heavily doped region having a second doping concentration in the doped layer, the second doping concentration is greater than the first doping concentration; and forming a solar cell by post-processing the annealed semiconductor substrate. The solar cell and the method for manufacturing the same simplify the manufacturing process and improve conversion efficiency of the solar cell.

A repair apparatus of a sheet type cell is capable of appropriately repairing and detoxifying defects of a sheet type cell having semiconductor characteristics. The repair apparatus repairs a sheet type cell in which a storage layer is sandwiched by layers of a positive electrode and a negative electrode and at least the storage layer has semiconductor characteristics. The repair apparatus applies electrical stimulation between the positive electrode and the negative electrode, measures electrical characteristics of the sheet type cell when the electrical stimulation is applied, and specifies a value of the electrical stimulation by the electrical stimulation source while considering measured electrical characteristics.

A photovoltaic cell may include a hydrogenated amorphous silicon layer including a n-type doped region and a p-type doped region. The n-type doped region may be separated from the p-type doped region by an intrinsic region. The photovoltaic cell may include a front transparent electrode connected to the n-type doped region, and a rear electrode connected to the p-type doped region. The efficiency may be optimized for indoor lighting values by tuning the value of the H2/SiH4 ratio of the hydrogenated amorphous silicon layer.

The present invention relates to a solar cell comprising a heterojunction photoelectric device comprising, a front electrode layer, a back electrode layer comprising a metallic contact layer, a light-absorbing silicon layer arranged between said front electrode and said back electrode layers and a doped silicon-based layer arranged between said light-absorbing silicon layer and said back electrode layer, characterized in that said heterojunction photoelectric device further comprises a wide band gap material layer having an electronic band gap greater than 1.4 eV, said wide band gap material layer being applied on a surface of the light-absorbing silicon layer between said light-absorbing silicon layer and said doped silicon-based layer. The present heterojunction layer or stack of layers is compatible with thermal annealing and firing processes at T above 600° C.