A photovoltaic device is proposed comprising a silicon-based substrate (2) having a p-type or n-type doping, with an intrinsic buffer layer (4) situated on said substrate. A first silicon layer (6) of a first doping type is situated on predetermined regions (4a) of the intrinsic buffer layer. The first layer has interstices (5) between said predetermined regions (4a). The first silicon layer comprises at least partially a microcrystalline layer at its side away from the substrate. A microcrystalline silicon layer (8) of a second doping type is situated on said first silicon layer (6). A third silicon layer (10) of the second doping type is situated on said intrinsic buffer layer at the interstices, the third silicon layer being amorphous at its side facing said silicon-based substrate and comprising an at least partially microcrystalline layer portion to the side away from the intrinsic buffer layer.

A method for manufacturing a photoelectric conversion device comprising the steps of fixing a first substrate including a semiconductor layer provided with a photoelectric conversion element, to a second substrate, thinning the first substrate fixed to the second substrate, from the opposite side of the first substrate from the second substrate, fixing the first substrate to a third substrate provided with a semiconductor element such that the third substrate is located on the opposite side of the first substrate from the second substrate, and removing the second substrate after the step of fixing the first substrate to the third substrate.

A method for manufacturing a photoelectric conversion device comprising the steps of fixing a first substrate including a semiconductor layer provided with a photoelectric conversion element, to a second substrate, thinning the first substrate fixed to the second substrate, from the opposite side of the first substrate from the second substrate, fixing the first substrate to a third substrate provided with a semiconductor element such that the third substrate is located on the opposite side of the first substrate from the second substrate, and removing the second substrate after the step of fixing the first substrate to the third substrate.

A method of forming a semiconductor material of a photovoltaic device that includes providing a surface of a hydrogenated amorphous silicon containing material, and annealing the hydrogenated amorphous silicon containing material in a deuterium containing atmosphere. Deuterium from the deuterium-containing atmosphere is introduced to the lattice of the hydrogenated amorphous silicon containing material through the surface of the hydrogenated amorphous silicon containing material. In some embodiments, the deuterium that is introduced to the lattice of the hydrogenated amorphous silicon containing material increases the stability of the hydrogenated amorphous silicon containing material.

Various embodiments of a compensated photonic device structure and fabrication method thereof are described herein. A photonic device may include a silicon-on-insulator (SOI) substrate with a buried oxide (BOX) layer therein, a Si waveguide and an n-type contact layer formed on the BOX layer, a Si multiplication layer disposed on the n-type contact layer, a p-type Si charge layer disposed on the Si multiplication layer, a germanium (Ge) absorption layer disposed on the p-type Si charge layer, a p-type contact layer disposed on the Ge absorption layer, and a metal layer disposed on the p-type contact layer. A compensated region may be formed between the p-type Si charge layer and the Ge absorption layer with a portion of the compensated region in the p-type Si charge layer and another portion of the compensated region in the Ge absorption layer.

Methods and apparatuses to produce graphene and nanoparticle catalysts supported on graphene without the use of reducing agents, and with the concomitant production of heat, are provided. The methods and apparatuses employ radiant energy to reduce (deoxygenate) graphite oxide (GO) to graphene, or to reduce a mixture of GO plus one or more metals to produce nanoparticle catalysts supported on graphene. Methods and systems to generate and utilize heat that is produced by irradiating GO, graphene and their metal and semiconductor nanocomposites with visible, infrared and/or ultraviolet radiation, e.g. using sunlight, lasers, etc. are also provided.

Methods of fabricating emitter regions of solar cells are described. Methods of forming layers on substrates of solar cells, and the resulting solar cells, are also described.

An imaging panel includes a photoelectric conversion element disposed on a substrate. The photoelectric conversion element includes a cathode electrode, a first semiconductor layer having a first conductive type, the first semiconductor layer being in contact with the cathode electrode, a second semiconductor layer having a second conductive type different from the first conductive type, the second semiconductor layer being joined to the first semiconductor layer, and an anode electrode in contact with the second semiconductor layer. The second semiconductor layer has a greater extinction coefficient as closer to the anode electrode.

A photoelectric conversion device with improved electric characteristics is provided. The photoelectric conversion device has a structure in which a window layer is formed by a stack of a first silicon semiconductor layer and a second silicon semiconductor layer, and the second silicon semiconductor layer has high carrier concentration than the first silicon semiconductor layer and has an opening. Light irradiation is performed on the first silicon semiconductor layer through the opening without passing through the second silicon semiconductor layer; thus, light absorption loss in the window layer can be reduced.

A solar cell includes: a semiconductor substrate which includes a first principal surface and a second principal surface; a first semiconductor layer of the first conductivity type disposed above the first principal surface; and a second semiconductor layer of a second conductivity type disposed below the second principal surface. The semiconductor substrate includes: a first impurity region of the first conductivity type; a second impurity region of the first conductivity type disposed between the first impurity region and the first semiconductor layer; and a third impurity region of the first conductivity type disposed between the first impurity region and the second semiconductor layer. A concentration of an impurity in the second impurity region is higher than a concentration of the impurity in the third impurity region, and the concentration of the impurity in the third impurity region is higher than a concentration of the impurity in the first impurity region.