Shockley-Read-Hall (SRH) generation and/or recombination in heterojunction devices is suppressed by unconventional doping at or near the heterointerface. The effect of this doping is to shift SRH generation and/or recombination preferentially into the wider band gap material of the heterojunction. This reduces total SRH generation and/or recombination in the device by decreasing the intrinsic carrier concentration n.sub.i at locations where most of the SRH generation and/or recombination occurs.

The physical basis for this effect is that the SRH generation and/or recombination rate tends to decrease as n.sub.i around the depletion region decreases, so decreasing the effective n.sub.i in this manner is a way to decrease SRH recombination.

A semiconductor device is provided, which includes an active structure and a first semiconductor layer. The active structure includes an active region having a topmost surface and a bottommost surface, and a first dopant distributing from the topmost surface to the bottommost surface. The first semiconductor layer is located under the active structure and includes a second dopant. The active region includes a semiconductor material including As.

An improved heterostructure for an optoelectronic device is provided. The heterostructure includes an active region, an electron blocking layer, and a p-type contact layer. The heterostructure can include a p-type interlayer located between the electron blocking layer and the p-type contact layer. In an embodiment, the electron blocking layer can have a region of graded transition. The p-type interlayer can also include a region of graded transition.

An optoelectronic semiconductor light emitting device configured to emit light having a wavelength in the range from about 150 nm to about 425 nm is disclosed. In embodiments, the device comprises a substrate having at least one epitaxial semiconductor layer disposed thereon, wherein each of the one or more epitaxial semiconductor layers comprises a metal oxide. Also disclosed is an optoelectronic semiconductor device for generating light of a predetermined wavelength comprising a substrate and an optical emission region. The optical emission region has an optical emission region band structure configured for generating light of the predetermined wavelength and comprises one or more epitaxial metal oxide layers supported by the substrate.

Methods, systems, and apparatuses are described for a CMOS compatible substrate having multiple stacks of semiconductor layers. The multiple stacks, at least, each include i) a layer of a tellurium based semiconductor layer on top of ii) a porous silicon layer. The porous silicon layer is a compliant layer to accept structural defects from the tellurium based semiconductor layer into the porous silicon layer. The multiple stacks are grown on the CMOS compatible substrate.

A semiconductor device is provided, which includes an active structure and a first semiconductor layer. The active structure includes an active region having a topmost surface and a bottommost surface, and a first dopant distributing from the topmost surface to the bottommost surface. The first semiconductor layer is located under the active structure and includes a second dopant. The active region includes a semiconductor material including As.

Quantum dots and electroluminescent device including the same. The quantum dots include an alloy core including a first semiconductor nanocrystal including indium (In), gallium (Ga), and phosphorous (P), and a semiconductor nanocrystal shell disposed on the alloy core, wherein the quantum dots do not include cadmium, wherein the quantum dots are configured to emit blue light having a maximum emission peak wavelength that is greater than or equal to about 440 nanometers (nm) and less than or equal to about 490 nm, wherein in the quantum dots, a mole ratio of gallium with respect to a sum of indium and gallium is greater than or equal to about 0.2:1 and less than or equal to about 0.75:1, and wherein the semiconductor nanocrystal shell includes a zinc chalcogenide.

Methods, systems, and apparatuses are described for a CMOS compatible substrate having multiple stacks of semiconductor layers. The multiple stacks, at least, each include i) a layer of a tellurium based semiconductor layer on top of ii) a porous silicon layer. The porous silicon layer is a compliant layer to accept structural defects from the tellurium based semiconductor layer into the porous silicon layer. The multiple stacks are grown on the CMOS compatible substrate.

A light-emitting element includes: a first electrode; a second electrode; a quantum dot layer provided between the first electrode and the second electrode, and containing quantum dots; and a hole-transport layer provided between the quantum dot layer and the first electrode, and containing a compound ZnM.sub.2O.sub.4 (where an element M is a metal element).

The present invention provides a semiconductor light emitting device including a substrate, a first semiconductor layer, a first cladding layer, an active layer, a second cladding layer and a second semiconductor layer, and a manufacturing method. The first semiconductor layer may be an n-type semiconductor including a III-V semiconductor or a II-VI semiconductor. The second semiconductor layer may be a p-type semiconductor including a I-VII semiconductor. The semiconductor light emitting device may further include a third cladding layer between the active layer and the second cladding layer, the third cladding layer including a III-V semiconductor or a II-VI semiconductor. Therefore, by providing the hybrid type semiconductor light emitting device and the manufacturing method thereof, the luminous efficiency limit of the p-type semiconductor can be overcome.