An optoelectronic device including a crystalline semiconductor layer based on GeSn and including a pin junction. This formed semiconductor layer includes a base portion; a single-crystal intermediate portion having an average value x.sub.pi1 of proportion of tin less than x.sub.ps1, thus forming a barrier region against charge carriers flowing in an upper portion; and the single-crystal upper portion including a homogeneous medium with a proportion of tin x.sub.ps1, and vertical structures having an average value x.sub.ps2 of proportion of tin greater than x.sub.ps1, thus forming regions for emitting or for receiving infrared radiation.

There is provided a quantum heterostructure and related devices, as well as methods for manufacturing the same. The quantum heterostructure includes a stack of coextending GeSn buffer layers and each GeSn buffer layer has a different Sn content one from another. The quantum heterostructure also includes a quantum well extending over the stack of coextending GeSn buffer layers, the quantum well comprising a highly tensile-strained layer, the highly tensile-strained layer comprising at least one group IV element and having a strain greater than or equal to 1%. The quantum heterostructure is compatible with silicon-based processing, manufacturing, and technologies. The method includes changing a reactor temperature and varying a molar fraction of an Sn-based precursor to achieve a stack of coextending GeSn buffer layers, each having a different Sn composition, on a substrate provided inside the reactor chamber and forming the quantum well over the stack of coextending GeSn buffer layers.

An optoelectronic device comprises a substrate; pads on a surface of the substrate; semiconductor elements, each element resting on a pad; a portion covering at least the lateral sides of each pad, the portion preventing the growth of the semiconductor elements on the lateral sides; and a dielectric region extending in the substrate from the surface and connecting, for each pair of pads, one of the pads in the pair to the other pad in the pair. A method of manufacturing an optoelectronic device is also disclosed.

Thin freestanding nitride veneers can be used for the fabrication of semiconductor devices. These veneers are typically less than 100 microns thick. The use of thin veneers also eliminates the need for subsequent wafer thinning for improved thermal performance and 3D packaging.

A process for fabricating an optoelectronic device for emitting infrared radiation, including: i) producing a first stack containing a light source, and a first bonding sublayer made from a metal of interest chosen from gold, titanium and copper, ii) producing a second stack containing a GeSn-based active layer obtained by epitaxy at an epitaxy temperature (T.sub.epi), and a second bonding sublayer made from the metal of interest, iii) determining an assembly temperature (Tc) substantially between an ambient temperature (T.sub.amb) and the epitaxy temperature (T.sub.epi), such that a direct bonding energy per unit area of the metal of interest is higher than or equal to 0.5 J/m.sup.2; and iv) joining, by direct bonding, at the assembly temperature (Tc), the stacks.

A photodiode has an active portion formed in a silicon substrate and covered with a stack of insulating layers successively including at least one first silicon oxide layer, an antireflection layer, and a second silicon oxide layer. The quantum efficiency of the photodiode is optimized by: determining, for the infrared wavelength, first thicknesses of the second layer corresponding to maximum absorptions of the photodiode, and selecting, from among the first thicknesses, a desired thickness, eox.sub.D, so that a maximum manufacturing dispersion is smaller than a half of a pseudo-period separating two successive maximum absorption values.

Methods and apparatuses to produce graphene and nanoparticle catalysts supported on graphene without the use of reducing agents, and with the concomitant production of heat, are provided. The methods and apparatuses employ radiant energy to reduce (deoxygenate) graphite oxide (GO) to graphene, or to reduce a mixture of GO plus one or more metals to produce nanoparticle catalysts supported on graphene. Methods and systems to generate and utilize heat that is produced by irradiating GO, graphene and their metal and semiconductor nanocomposites with visible, infrared and/or ultraviolet radiation, e.g. using sunlight, lasers, etc. are also provided.

The present application discloses a display panel, a display device and a manufacturing method. The display panel includes light-emitting diodes. The light-emitting diodes includes a blue luminescent layer. The blue luminescent layer includes a germanium silicon quantum dot material. A proportion range of a silicon element in the light-emitting diodes is 65%-90%, and a proportion range of a germanium element is 10%-35%.

A method for making a semiconductor device may include forming a plurality of waveguides on a substrate, and forming a superlattice overlying the substrate and waveguides. The superlattice may include a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may further include forming an active device layer on the superlattice comprising at least one active semiconductor device.

A layered heterostructure, comprising alternating layers of different semiconductors, wherein one of the atom species of one of the semiconductors has a faster diffusion rate along an oxidizing interface than an atom species of the other semiconductor at an oxidizing temperature, can be used to fabricate embedded nanostructures with arbitrary shape. The result of the oxidation will be an embedded nanostructure comprising the semiconductor having slower diffusing atom species surrounded by the semiconductor having the higher diffusing atom species. The method enables the fabrication of low- and multi-dimensional quantum-scale embedded nanostructures, such as quantum dots (QDs), toroids, and ellipsoids.