Patent classifications
H01L33/14
SEMICONDUCTOR LIGHT-EMITTING ELEMENT AND METHOD OF MANUFACTURING SEMICONDUCTOR LIGHT-EMITTING ELEMENT
The semiconductor light-emitting element includes an n-type semiconductor layer; an active layer on the n-type semiconductor layer; a p-type semiconductor layer on the active layer; a p-side contact electrode in contact with the p-type semiconductor layer; a p-side current diffusion layer on the p-side contact electrode; an n-side contact electrode in contact with the n-type semiconductor layer; and an n-side current diffusion layer that includes a first current diffusion layer on the n-side contact electrode, and a second current diffusion layer on the first current diffusion layer, and including a TiN layer. A height difference between upper surfaces of the p-side contact electrode and the first current diffusion layer is 100 nm or smaller; and a height difference between upper surfaces of the p-side current diffusion layer and the second current diffusion layer is 100 nm or smaller.
RADIATION EMITTING SEMICONDUCTOR CHIP
A radiation emitting semiconductor chip may include a first semiconductor layer sequence, a second semiconductor layer sequence arranged on the first semiconductor layer sequence, a first contact structure configured to inject charge carriers into the first semiconductor layer sequence, and a contact layer sequence configured to inject charge carriers into the second semiconductor layer sequence. The first contact structure and the contact layer sequence may be formed without overlapping in lateral directions in plan view. The contact layer sequence may have a sheet resistance, which increases in the direction of the first contact structure.
RADIATION EMITTING SEMICONDUCTOR CHIP
A radiation emitting semiconductor chip may include a first semiconductor layer sequence, a second semiconductor layer sequence arranged on the first semiconductor layer sequence, a first contact structure configured to inject charge carriers into the first semiconductor layer sequence, and a contact layer sequence configured to inject charge carriers into the second semiconductor layer sequence. The first contact structure and the contact layer sequence may be formed without overlapping in lateral directions in plan view. The contact layer sequence may have a sheet resistance, which increases in the direction of the first contact structure.
LIGHT-EMITTING DEVICE
A light-emitting device includes a semiconductor epitaxial structure that has a first surface and a second surface opposite to the first surface, and that includes a first semiconductor layer, an active layer, and a second semiconductor layer sequentially stacked on one another in such order from the first surface to the second surface. The active layer includes a quantum well structure having multiple periodic units each of which includes a well layer and a barrier layer disposed sequentially in such order. A bandgap of the barrier layer is greater than that of the well layer, and the bandgaps of the barrier layers gradually increase in a direction from the first surface of the semiconductor epitaxial structure to the second surface of the semiconductor epitaxial structure.
SEMICONDUCTOR STRUCTURES AND METHODS OF MANUFACTURING THE SAME
This application provides semiconductor structures and methods of manufacturing the same. A semiconductor structure includes: an N-type semiconductor layer, a light emitting layer, and a P-type ion doped layer that are disposed from bottom to up, wherein the P-type ion doped layer comprises an activated region and non-activated regions located on two sides of the activated region, P-type doping ions in the activated region are activated, and P-type doping ions in the non-activated region are passivated. The layout of the activated region and the non-activated regions makes an LED include: a high-efficiency light emitting region and light emitting obstacle regions located on two sides of the high-efficiency light emitting region.
Quantum well-based LED structure enhanced with sidewall hole injection
A light emitting diode (LED) structure includes a semiconductor template having a template top-surface, an active quantum well (QW) structure formed over the semiconductor template, and a p-type layer. The p-type layer has a bottom-surface that faces the active QW and the template top-surface. The bottom-surface includes a recess sidewall. The recess sidewall of the p-type layer is configured for promoting injection of holes into the active QW structure through a QW sidewall of the active QW structure.
PIXEL FOR MICRO- DISPLAY HAVING VERTICALLY STACKED SUB-PIXELS
A unit pixel of a microdisplay is disclosed. In the unit pixel, sub-pixels that form blue light, green light, and red light are vertically stacked on a growth substrate. Accordingly, the unit pixel area may be reduced, and pixel transfer processing is facilitated.
PIXEL FOR RGCB MICRO-DISPLAY HAVING VERTICALLY STACKED SUB-PIXELS
A unit pixel of a Red-Green-Cyan-Blue (RGCB) microdisplay is disclosed. In the unit pixel, sub-pixels that form blue light, green light, cyan light, and red light, are vertically stacked on a growth substrate. Accordingly, the unit pixel area may be reduced, and pixel transfer processing is facilitated.
EPITAXIAL STRUCTURE AND LIGHT-EMITTING DIODE INCLUDING THE SAME
An epitaxial structure includes an n-type layer, a p-type layer, an active layer, and a current spreading layer. The active and current spreading layers respectively have first and third concentration profiles of indium which respectively include first and third characteristic peaks. A heavily doped layer formed between the active and current spreading layers has a second concentration profile of silicon with a second characteristic peak. A ratio of a first minimum horizontal distance between peak tops of first and third characteristic peaks, to a second minimum horizontal distance between peak tops of second and third characteristic peaks, is less than one seventh.
EPITAXIAL STRUCTURE AND LIGHT-EMITTING DIODE INCLUDING THE SAME
An epitaxial structure includes an n-type layer, a p-type layer, an active layer, and a current spreading layer. The active and current spreading layers respectively have first and third concentration profiles of indium which respectively include first and third characteristic peaks. A heavily doped layer formed between the active and current spreading layers has a second concentration profile of silicon with a second characteristic peak. A ratio of a first minimum horizontal distance between peak tops of first and third characteristic peaks, to a second minimum horizontal distance between peak tops of second and third characteristic peaks, is less than one seventh.