Provided are nanorod light emitting diodes (LEDs), display apparatuses, and manufacturing methods thereof. The nanorod LED includes a first-type semiconductor layer including a body and a pyramidal structure continuously provided from the body, a nitride light emitting layer provided on the pyramidal structure, and a second-type semiconductor layer provided in the nitride light emitting layer.

A display device and a manufacturing method of the display device are provided. A display device includes a conductive line disposed on a substrate, a first capacitor electrode disposed on the conductive line and electrically connected to the conductive line, a passivation layer disposed on the first capacitor electrode, a first electrode disposed on the passivation layer and at least partially overlapping the first capacitor electrode in a plan view, a second electrode spaced apart from the first electrode, the second electrode and the first electrode being disposed on a same layer, and light emitting elements disposed between the first electrode and the second electrode.

A display device may include a substrate including pixel areas, and a pixel disposed in each of the pixel area. The pixel may include a transistor and a driving voltage line disposed in the substrate, first and second electrodes spaced apart from each other, a bank pattern disposed on the first and second electrodes, respectively, intermediate layers disposed on the bank pattern, light emitting elements disposed between two adjacent intermediate layers of the intermediate layers, a first contact electrode disposed on one of the two adjacent intermediate layers and electrically connected to an end of each of the light emitting elements, and a second contact electrode disposed on another one of the two adjacent intermediate layers and electrically connected to another end of each of the light emitting elements.

A light-emitting element including: a first semiconductor layer doped with a first type of dopant; a second semiconductor layer doped with a second type of dopant that is different from the first type of dopant; and an active layer between the first semiconductor layer and the second semiconductor layer, wherein a length of the light-emitting element measured in a first direction, which may be a direction in which the first semiconductor layer, the active layer, and the second semiconductor layer may be arranged, may be shorter than the width measured in a second direction that is perpendicular to the first direction.

A light-emitting element including: a first semiconductor layer doped with a first type of dopant; a second semiconductor layer doped with a second type of dopant that is different from the first type of dopant; and an active layer between the first semiconductor layer and the second semiconductor layer, wherein a length of the light-emitting element measured in a first direction, which may be a direction in which the first semiconductor layer, the active layer, and the second semiconductor layer may be arranged, may be shorter than the width measured in a second direction that is perpendicular to the first direction.

A light-emitting element extending in one direction includes: a semiconductor core including a main body extending in the one direction, a first end connected to one side of the main body and having an inclined side surface, and a second end connected to an other side of the main body and having a width less than that of the main body; and an insulation film around at least a portion of the outer surface of the semiconductor core, wherein the insulation film includes a first insulation film around the first end of the semiconductor core; and a second insulation film around the second end of the semiconductor core, wherein the diameter of an outer surface of the first insulation film is the same as a diameter of an outer surface of the second insulation film.

A display device includes a substrate including a display area in which a plurality of sub-pixels are disposed, a plurality of anode electrodes respectively connected to the plurality of sub-pixels, and a cathode electrode connected to the plurality of sub-pixels and spaced apart from each of the plurality of anode electrodes. Each of the plurality of anode electrodes is disposed closer to the substrate than the cathode electrode by a height difference compensation part.

Described are light emitting diode (LED) devices comprising a plurality of mesas defining pixels, each of the mesas comprising semiconductor layers, an N-contact material in a space between each of the plurality of mesas, a dielectric material which insulates sidewalls of the P-type layer and the active region from the metal. A hard mask layer is above the semiconductor layers, the hard mask layer having a plurality of openings therein, each partially filled with a liner layer and partially filled with a P-metal material plug, the P-metal material plug having a width; and a passivation film is on the hard mask layer, the passivation film having a plurality of passivation film openings therein defining a width, the width of each passivation film opening being less than the width of a combination of the P-metal material plug and the liner layer.

Described are light emitting diode (LED) devices comprising a plurality of mesas defining pixels, each of the mesas comprising semiconductor layers, an N-contact material in a space between each of the plurality of mesas, a dielectric material which insulates sidewalls of the P-type layer and the active region from the metal. A hard mask layer is above the semiconductor layers, the hard mask layer having a plurality of openings therein, each partially filled with a liner layer and partially filled with a P-metal material plug, the P-metal material plug having a width; and a passivation film is on the hard mask layer, the passivation film having a plurality of passivation film openings therein defining a width, the width of each passivation film opening being less than the width of a combination of the P-metal material plug and the liner layer.

A light emitting diode (LED) structure includes a semiconductor template having a template top-surface, an active quantum well (QW) structure formed over the semiconductor template, and a p-type layer. The p-type layer has a bottom-surface that faces the active QW and the template top-surface. The bottom-surface includes a recess sidewall. The recess sidewall of the p-type layer is configured for promoting injection of holes into the active QW structure through a QW sidewall of the active QW structure.