A semiconductor package includes: an encapsulation layer sealing at least one semiconductor chip; a redistribution level layer arranged on the encapsulation layer; a laser mark metal layer arranged on the redistribution level layer; and a laser mark arranged inside the laser mark metal layer. The laser mark includes letters, numbers, figures, symbols, and recognition codes indicating various pieces of information of the semiconductor package.

The present invention relates to a system and a method for confirming the mounted state of picker mounts. Barcodes are formed on corresponding picker mounts while including information for identifying each type of picker mount. A barcode reader is arranged on one side of a variable picker module so as to sequentially read each barcode of the picker mounts moving in the arrangement direction of pickers while mounted on the pickers. A system controller identifies each position and type of the corresponding picker mounts on the basis of information provided from the barcode reader, and then, compares same with confirmation criteria so as to confirm incorrect mounting and non-mounting of the picker mounts.

An electronic device comprising a semiconductor chip which comprises a plurality of structures formed in the semiconductor chip, wherein the semiconductor chip is a member of a set of semiconductor chips, the set of semiconductor chips comprises a plurality of subsets of semiconductor chips, and the semiconductor chip is a member of only one of the subsets. The plurality of structures of the semiconductor chip includes a set of common structures which is the same for all of the semiconductor chips of the set, and a set of non-common structures, wherein the non-common structures of the semiconductor chip of the subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a first portion of the non-common structures and a first portion of the common structures form a first non-common circuit, wherein the first non-common circuit of the semiconductor chips of each subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a second portion of the non-common structures is adapted to store or generate a first predetermined value which uniquely identifies the first non-common circuit, wherein the first predetermined value is readable from outside the semiconductor chip by automated reading means.

Product management and/or prompt defect analysis of a semiconductor device may be carried out without reducing the throughput in assembly and testing. Unique identification information is attached to a plurality of substrates (lead frames) used in manufacturing a semiconductor device (QFP) and to a transport unit for transporting a plurality of substrates, respectively. Identification information (rack ID) of the transport unit and identification information (substrate ID) of the substrate stored into the transport unit are associated with each other. The substrate is taken out from the transport unit set to a loader unit of each manufacturing apparatus and supplied to a processing unit, of the apparatus and in storing the substrate, the processing of which is complete, into a transport unit of an unloader unit of the apparatus, an association between identification information of the transport unit and the identification information of the substrate is checked.

A microelectronic assembly is provided, comprising: a first plurality of integrated circuit (IC) dies in a first level, each one of the first plurality of IC dies having respective first physical unclonable function (PUF) circuits; a second IC die having a second PUF circuit and a security circuit; a second plurality of IC dies in a second level, the second level not coplanar with the first level, the first level and the second level being coupled with interconnects having a pitch of less than 10 micrometers between adjacent ones of the interconnects; and conductive pathways between the first plurality of IC dies and the second IC die for communication between the first PUF circuits and the second PUF circuit, the conductive pathways comprising a portion of the interconnects.

Electronic device comprising at least: a plurality of MOSFET FD-SOI type transistors among which the first transistors are such that each first transistor comprises a channel in which a concentration of the same type of dopants as those present in the source and drain of said first transistor is greater than the concentration in the channel of each of the other transistors in said plurality of transistors; and an identification circuit capable of determining a unique identifier of the electronic device starting from at least one intrinsic electrical characteristic of each of the first transistors, the value of which depends at least partly on the conductance of said first transistor; and in which the length of a gate of each of the first transistors is less than or equal to about 20 nm.

A barcoded end facet printed photonic chip includes: an optically transparent direct laser writing substrate including a transverse waveguide writing surface to receive a direct write laser light for off-axis direct write laser printing and a facet surface to receive the direct write laser light for on-axis direct write laser printing of a barcode-guided direct laser written optical coupling on the facet surface; a waveguide disposed in the optically transparent direct laser writing substrate and in optical communication with the facet surface; and an optically visible bulk impregnated barcode disposed in the optically transparent direct laser writing substrate arranged proximate to the waveguide and in optical communication with the facet surface.

An integrated circuit (IC) package includes an interconnect comprising patches of unoxidized metal that are circumscribed by a region of roughened metal formed of oxidized metal. The IC package also includes a die mounted on the interconnect. The die is conductively coupled to at least a subset of the patches of unoxidized metal.

A polishing composition eliminating protrusions around a laser mark in wafer polishing processes, the manufacturing method therefor and a polishing method using the composition. The polishing composition including silica particles and water, wherein: the composition includes a tetraalkylammonium ion such that the mass ratio of the ion to SiO.sub.2 of the silica particles is 0.400 to 1.500:1, and the mass ratio of SiO.sub.2 dissolved in the polishing composition to SiO.sub.2 is 0.100 to 1.500:1; the tetraalkylammonium ion is derived from a compound selected from the group made of an alkali silicate, a hydroxide, a carbonate, a sulfate, and a halide while the ion is contained in the polishing composition in 0.2% by mass to 8.0% by mass; and the dissolved SiO.sub.2 is derived from a tetraalkylammonium silicate, a potassium silicate, a sodium silicate, or a mixture of any of these.

Systems and methods for visual identification of semiconductor dies are described. In some embodiments, a method may include: receiving a semiconductor wafer having a plurality of dies and printing a unique visual identification mark on each of the plurality of dies. In other embodiments, a method may include receiving an electronic device comprising a die and a package surrounding at least a portion of the die and reading, from the electronic device, a unique visual identification mark that encodes a Cartesian coordinate of the die relative to a reference point on a semiconductor wafer.