In one example, a semiconductor device comprises a first substrate comprising a first conductive structure, a first body over the first conductive structure and comprising an inner sidewall defining a cavity in the first body, a first interface dielectric over the first body, and a first internal interconnect in the first body and the first interface dielectric, and coupled with the first conductive structure. The semiconductor device further comprises a second substrate over the first substrate and comprising a second interface dielectric, a second body over the second interface dielectric, and a second conductive structure over the second body and comprising a second internal interconnect in the second body and the second interface dielectric. An electronic component is in the cavity, and the second internal interconnect is coupled with the first internal interconnect. Other examples and related methods are also disclosed herein.

In one example, a semiconductor device comprises a first substrate comprising a first conductive structure, a first body over the first conductive structure and comprising an inner sidewall defining a cavity in the first body, a first interface dielectric over the first body, and a first internal interconnect in the first body and the first interface dielectric, and coupled with the first conductive structure. The semiconductor device further comprises a second substrate over the first substrate and comprising a second interface dielectric, a second body over the second interface dielectric, and a second conductive structure over the second body and comprising a second internal interconnect in the second body and the second interface dielectric. An electronic component is in the cavity, and the second internal interconnect is coupled with the first internal interconnect. Other examples and related methods are also disclosed herein.

A semiconductor package includes a first substrate, a first semiconductor chip disposed on the first substrate, a second substrate disposed on the first semiconductor chip, a second semiconductor chip disposed on the second substrate, and a mold layer disposed between the first substrate and the second substrate. The second substrate includes a recess formed at an edge, the mold layer fills the recess, and the recess protrudes concavely inward from the edge of the second substrate toward a center of the second substrate.

A semiconductor package includes a first substrate, a first semiconductor chip disposed on the first substrate, a second substrate disposed on the first semiconductor chip, a second semiconductor chip disposed on the second substrate, and a mold layer disposed between the first substrate and the second substrate. The second substrate includes a recess formed at an edge, the mold layer fills the recess, and the recess protrudes concavely inward from the edge of the second substrate toward a center of the second substrate.

A bond tip for thermocompression bonding a bottom surface includes a die contact area and a low surface energy material covering at least a portion of the bottom surface. The low surface energy material may cover substantially all of the bottom surface, or only a peripheral portion surrounding the die contact area. The die contact area may be recessed with respect to the peripheral portion a depth at least as great as a thickness of a semiconductor die to be received in the recessed die contact area. A method of thermocompression bonding is also disclosed.

A bond tip for thermocompression bonding a bottom surface includes a die contact area and a low surface energy material covering at least a portion of the bottom surface. The low surface energy material may cover substantially all of the bottom surface, or only a peripheral portion surrounding the die contact area. The die contact area may be recessed with respect to the peripheral portion a depth at least as great as a thickness of a semiconductor die to be received in the recessed die contact area. A method of thermocompression bonding is also disclosed.

In one example, an electronic device comprises a base substrate comprising a base substrate conductive structure, a first electronic component over a first side of the base substrate, an encapsulant over the first side of the base substrate, wherein the encapsulant contacts a lateral side of the electronic component, an interposer substrate over a first side of the encapsulant and comprising an interposer substrate conductive structure, and a vertical interconnect in the encapsulant and coupled with the base substrate conductive structure and the interposer substrate conductive structure. A first one of the base substrate or the interposer substrate comprises a redistribution layer (RDL) substrate, and a second one of the base substrate or the interposer substrate comprises a laminate substrate. Other examples and related methods are also disclosed herein.

In one example, an electronic device comprises a base substrate comprising a base substrate conductive structure, a first electronic component over a first side of the base substrate, an encapsulant over the first side of the base substrate, wherein the encapsulant contacts a lateral side of the electronic component, an interposer substrate over a first side of the encapsulant and comprising an interposer substrate conductive structure, and a vertical interconnect in the encapsulant and coupled with the base substrate conductive structure and the interposer substrate conductive structure. A first one of the base substrate or the interposer substrate comprises a redistribution layer (RDL) substrate, and a second one of the base substrate or the interposer substrate comprises a laminate substrate. Other examples and related methods are also disclosed herein.

A method for manufacturing a semiconductor package structure is provided. The method includes: (a) providing a semiconductor structure including a first device and a second device; (b) irradiating the first device by a first energy-beam with a first irradiation area; and (c) irradiating the first device and the second device by a second energy-beam with a second irradiation area greater than the first irradiation area of the first energy-beam.

A method for manufacturing a semiconductor package structure is provided. The method includes: (a) providing a semiconductor structure including a first device and a second device; (b) irradiating the first device by a first energy-beam with a first irradiation area; and (c) irradiating the first device and the second device by a second energy-beam with a second irradiation area greater than the first irradiation area of the first energy-beam.