H01L2924/01011

Method for applying a bonding layer
10438925 · 2019-10-08 · ·

A method for applying a bonding layer that is comprised of a basic layer and a protective layer on a substrate with the following method steps: application of an oxidizable basic material as a basic layer on a bonding side of the substrate, at least partial covering of the basic layer with a protective material that is at least partially dissolvable in the basic material as a protective layer. In addition, the invention relates to a corresponding substrate.

FLIP CHIP PHOTODETECTOR BY USING PLATING AU PILLARS METHOD
20190243079 · 2019-08-08 ·

The present invention is a flip-chip photodetector, comprising a carrier and a back-illuminated chip having a central portion and a peripheral portion, wherein the central portion has a greater thickness than the peripheral portion; the peripheral portion is provided with a plurality of metal pillars connected to the carrier, and the back illuminated chip is connected to the carrier by the plurality of metal pillars; further, the plurality of the metal pillars are provided on the back-illuminated chip by electroless plating.

FLIP CHIP PHOTODETECTOR BY USING PLATING AU PILLARS METHOD
20190243079 · 2019-08-08 ·

The present invention is a flip-chip photodetector, comprising a carrier and a back-illuminated chip having a central portion and a peripheral portion, wherein the central portion has a greater thickness than the peripheral portion; the peripheral portion is provided with a plurality of metal pillars connected to the carrier, and the back illuminated chip is connected to the carrier by the plurality of metal pillars; further, the plurality of the metal pillars are provided on the back-illuminated chip by electroless plating.

REDISTRIBUTION LAYER (RDL) LAYOUTS FOR INTEGRATED CIRCUITS

Exemplary embodiments for redistribution layers of integrated circuits are disclosed. The redistribution layers of integrated circuits of the present disclosure include one or more arrays of conductive contacts that are configured and arranged to allow a bonding wave to displace air between the redistribution layers during bonding. This configuration and arrangement of the one or more arrays minimize discontinuities, such as pockets of air to provide an example, between the redistribution layers during the bonding.

REDISTRIBUTION LAYER (RDL) LAYOUTS FOR INTEGRATED CIRCUITS

Exemplary embodiments for redistribution layers of integrated circuits are disclosed. The redistribution layers of integrated circuits of the present disclosure include one or more arrays of conductive contacts that are configured and arranged to allow a bonding wave to displace air between the redistribution layers during bonding. This configuration and arrangement of the one or more arrays minimize discontinuities, such as pockets of air to provide an example, between the redistribution layers during the bonding.

REVERSABLE ATTACHMENT SYSTEM

A reversable attachment system includes an adhesion layer, an inter-substrate bond structure, a mating layer and an extension actuator. The adhesion layer is configured to attach to a first substrate. The inter-substrate bond structure is coupled to the adhesion layer. The mating layer is configured to attach to a second substrate. The extension actuator is configured to attach to the second substrate and expand in response to an absorption of a gas. The inter-substrate bond structure is configured to form an initial thermocompression bond with the mating layer in response to an applied pressure and an applied heat. The expansion of the extension actuator in response to absorbing the gas detaches the inter-substrate bond structure from the mating layer.

Semiconductor device having polyimide layer
10211143 · 2019-02-19 · ·

Highly reliable interconnections for microelectronic packaging. In one embodiment, dielectric layers in a build-up interconnect have a gradation in glass transition temperature; and the later applied dielectric layers are laminated at temperatures lower than the glass transition temperatures of the earlier applied dielectric layers. In one embodiment, the glass transition temperatures of earlier applied dielectric films in a build-up interconnect are increased through a thermosetting process to exceed the temperature for laminating the later applied dielectric films. In one embodiment, a polyimide material is formed with embedded catalysts to promote cross-linking after a film of the polyimide material is laminated (e.g., through photo-chemical or thermal degradation of the encapsulant of the catalysts). In one embodiment, the solder resist opening walls have a wettable layer generated through laser assisted seeding so that there is no gap between the solder resist opening walls and no underfill in the solder resist opening.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

WIRE BONDING SYSTEMS AND RELATED METHODS

A wire bond system. Implementations may include: a bond wire including copper (Cu), a bond pad including aluminum (Al) and a sacrificial anode electrically coupled with the bond pad, where the sacrificial anode includes one or more elements having a standard electrode potential below a standard electrode potential of Al.

WIRE BONDING SYSTEMS AND RELATED METHODS

A wire bond system. Implementations may include: a bond wire including copper (Cu), a bond pad including aluminum (Al) and a sacrificial anode electrically coupled with the bond pad, where the sacrificial anode includes one or more elements having a standard electrode potential below a standard electrode potential of Al.