Patent classifications
H01L2924/01034
Bump integrated thermoelectric cooler
An IC package, comprising a first IC component comprising a first interconnect on a first surface thereof; a second IC component comprising a second interconnect on a second surface thereof. The second component is above the first component, and the second surface is opposite the first surface. A thermoelectric cooling (TEC) device is between the first surface and the second surface. The TEC device is electrically coupled to the first interconnect and to the second interconnect.
Bump integrated thermoelectric cooler
An IC package, comprising a first IC component comprising a first interconnect on a first surface thereof; a second IC component comprising a second interconnect on a second surface thereof. The second component is above the first component, and the second surface is opposite the first surface. A thermoelectric cooling (TEC) device is between the first surface and the second surface. The TEC device is electrically coupled to the first interconnect and to the second interconnect.
Alternative compositions for high temperature soldering applications
Invention compositions are a replacement for high melting temperature solder pastes and preforms in high operating temperature and step-soldering applications. In the use of the invention, a mixture of metallic powders reacts below 350 degrees C. to form a dense metallic joint that does not remelt at the original process temperature.
Alternative compositions for high temperature soldering applications
Invention compositions are a replacement for high melting temperature solder pastes and preforms in high operating temperature and step-soldering applications. In the use of the invention, a mixture of metallic powders reacts below 350 degrees C. to form a dense metallic joint that does not remelt at the original process temperature.
Advanced solder alloys for electronic interconnects
Improved electrical and thermal properties of solder alloys are achieved by the use of micro-additives in solder alloys to engineer the electrical and thermal properties of the solder alloys and the properties of the reaction layers between the solder and the metal surfaces. The electrical and thermal conductivity of alloys and that of the reaction layers between the solder and the -metal surfaces can be controlled over a wide range of temperatures. The solder alloys produce stable microstructures wherein such stable microstructures of these alloys do not exhibit significant changes when exposed to changes in temperature, compared to traditional interconnect materials.
Advanced Device Assembly Structures And Methods
A microelectronic assembly includes a first substrate having a surface and a first conductive element and a second substrate having a surface and a second conductive element. The assembly further includes an electrically conductive alloy mass joined to the first and second conductive elements. First and second materials of the alloy mass each have a melting point lower than a melting point of the alloy. A concentration of the first material varies in concentration from a relatively higher amount at a location disposed toward the first conductive element to a relatively lower amount toward the second conductive element, and a concentration of the second material varies in concentration from a relatively higher amount at a location disposed toward the second conductive element to a relatively lower amount toward the first conductive element.
Advanced Device Assembly Structures And Methods
A microelectronic assembly includes a first substrate having a surface and a first conductive element and a second substrate having a surface and a second conductive element. The assembly further includes an electrically conductive alloy mass joined to the first and second conductive elements. First and second materials of the alloy mass each have a melting point lower than a melting point of the alloy. A concentration of the first material varies in concentration from a relatively higher amount at a location disposed toward the first conductive element to a relatively lower amount toward the second conductive element, and a concentration of the second material varies in concentration from a relatively higher amount at a location disposed toward the second conductive element to a relatively lower amount toward the first conductive element.
Radiation-hardened package for an electronic device
The package comprises a carrier, an electronic device arranged on the carrier, a shield arranged on the electronic device on a side facing away from the carrier, and an absorber film comprising nanomaterial applied on or above the shield.
Gold-coated silver bonding wire and manufacturing method thereof, and semiconductor device and manufacturing method thereof
A gold-coated silver bonding wire includes: a core material containing silver as a main component; and a coating layer provided on a surface of the core material and containing gold as a main component. The gold-coated silver bonding wire contains gold in a range of not less than 2 mass % nor more than 7 mass %, and at least one sulfur group element selected from the group consisting of sulfur, selenium, and tellurium in a range of not less than 1 mass ppm nor more than 80 mass ppm, with respect to a total content of the bonding wire.
Gold-coated silver bonding wire and manufacturing method thereof, and semiconductor device and manufacturing method thereof
A gold-coated silver bonding wire includes: a core material containing silver as a main component; and a coating layer provided on a surface of the core material and containing gold as a main component. The gold-coated silver bonding wire contains gold in a range of not less than 2 mass % nor more than 7 mass %, and at least one sulfur group element selected from the group consisting of sulfur, selenium, and tellurium in a range of not less than 1 mass ppm nor more than 80 mass ppm, with respect to a total content of the bonding wire.