A process for electrically connecting contact surfaces of electronic components by capillary wedge bonding a round wire of 8 to 80 μm to the contact surface of a first electronic component, forming a wire loop, and stitch bonding the wire to the contact surface of a second electronic component, wherein the wire comprises a wire core having a silver or silver-based wire core with a double-layered coating comprised of a 1 to 50 nm thick inner layer of nickel or palladium and an adjacent 5 to 200 nm thick outer layer of gold.

An epoxy resin composition for encapsulating a semiconductor device and a semiconductor device encapsulated by the epoxy resin composition, the composition including a base resin; a filler; a colorant; and a thermochromic pigment, wherein a color of the thermochromic pigment is irreversibly changed when a temperature thereof exceeds a predetermined temperature.

In a method of manufacturing a semiconductor device, an opening is formed in a first dielectric layer so that a part of a lower conductive layer is exposed at a bottom of the opening, one or more liner conductive layers are formed over the part of the lower conductive layer, an inner sidewall of the opening and an upper surface of the first dielectric layer, a main conductive layer is formed over the one or more liner conductive layers, a patterned conductive layer is formed by patterning the main conductive layer and the one or more liner conductive layers, and a cover conductive layer is formed over the patterned conductive layer. The main conductive layer which is patterned is wrapped around by the cover conductive layer and one of the one or more liner conductive layers.

In a method of manufacturing a semiconductor device, an opening is formed in a first dielectric layer so that a part of a lower conductive layer is exposed at a bottom of the opening, one or more liner conductive layers are formed over the part of the lower conductive layer, an inner sidewall of the opening and an upper surface of the first dielectric layer, a main conductive layer is formed over the one or more liner conductive layers, a patterned conductive layer is formed by patterning the main conductive layer and the one or more liner conductive layers, and a cover conductive layer is formed over the patterned conductive layer. The main conductive layer which is patterned is wrapped around by the cover conductive layer and one of the one or more liner conductive layers.

There is provided a Cu bonding wire having a Pd coating layer on a surface thereof, that improves bonding reliability of a ball bonded part in a high-temperature and high-humidity environment and is suitable for on-vehicle devices.

The bonding wire for a semiconductor device includes a Cu alloy core material and a Pd coating layer formed on a surface of the Cu alloy core material, and the bonding wire contains In of 0.011 to 1.2% by mass and has the Pd coating layer of a thickness of 0.015 to 0.150 μm. With this configuration, it is able to increase the bonding longevity of a ball bonded part in a high-temperature and high-humidity environment, and thus to improve the bonding reliability. When the Cu alloy core material contains one or more elements of Pt, Pd, Rh and Ni in an amount, for each element, of 0.05 to 1.2% by mass, it is able to increase the reliability of a ball bonded part in a high-temperature environment of 175° C. or more. When an Au skin layer is further formed on a surface of the Pd coating layer, wedge bondability improves.

There is provided a Cu bonding wire having a Pd coating layer on a surface thereof, that improves bonding reliability of a ball bonded part in a high-temperature and high-humidity environment and is suitable for on-vehicle devices.

The bonding wire for a semiconductor device includes a Cu alloy core material and a Pd coating layer formed on a surface of the Cu alloy core material, and the bonding wire contains In of 0.011 to 1.2% by mass and has the Pd coating layer of a thickness of 0.015 to 0.150 μm. With this configuration, it is able to increase the bonding longevity of a ball bonded part in a high-temperature and high-humidity environment, and thus to improve the bonding reliability. When the Cu alloy core material contains one or more elements of Pt, Pd, Rh and Ni in an amount, for each element, of 0.05 to 1.2% by mass, it is able to increase the reliability of a ball bonded part in a high-temperature environment of 175° C. or more. When an Au skin layer is further formed on a surface of the Pd coating layer, wedge bondability improves.

The present invention relates to a film for semiconductor device production, which includes: a separator; and a plurality of adhesive layer-attached dicing tapes each including a dicing tape and an adhesive layer laminated on the dicing tape, which are laminated on the separator at a predetermined interval in such a manner that the adhesive layer attaches to the separator, in which the separator has a cut formed along the outer periphery of the dicing tape, and the depth of the cut is at most ⅔ of the thickness of the separator.

A bonding wire and a method of manufacturing the bonding wire are provided. The bonding wire contains 90.0 to 99.0 wt % of silver (Ag); 0.2 to 2.0 wt % of gold (Au); 0.2 to 4.0 wt % of palladium (Pd), platinum (Pt), rhodium (Rh), or a combination thereof; 10 to 1000 ppm of dopants; and inevitable impurities. In the wire, the ratio of (a)/(b) is 3 to 5, in which (a) represents the amount of crystal grains having <100> orientation in crystalline orientations <hkl> in a wire lengthwise direction and (b) represents the amount of crystal grains having <111> orientation in crystalline orientations <hkl> in the wire lengthwise direction.

A bonding wire and a method of manufacturing the bonding wire are provided. The bonding wire contains 90.0 to 99.0 wt % of silver (Ag); 0.2 to 2.0 wt % of gold (Au); 0.2 to 4.0 wt % of palladium (Pd), platinum (Pt), rhodium (Rh), or a combination thereof; 10 to 1000 ppm of dopants; and inevitable impurities. In the wire, the ratio of (a)/(b) is 3 to 5, in which (a) represents the amount of crystal grains having <100> orientation in crystalline orientations <hkl> in a wire lengthwise direction and (b) represents the amount of crystal grains having <111> orientation in crystalline orientations <hkl> in the wire lengthwise direction.

Methods, techniques, and structures relating to die packaging. In one exemplary implementation, a die package interconnect structure includes a semiconductor substrate and a first conducting layer in contact with the semiconductor substrate. The first conducting layer may include a base layer metal. The base layer metal may include Cu. The exemplary implementation may also include a diffusion barrier in contact with the first conducting layer and a wetting layer on top of the diffusion barrier. A bump layer may reside on top of the wetting layer, in which the bump layer may include Sn, and Sn may be electroplated. The diffusion barrier may be electroless and may be adapted to prevent Cu and Sn from diffusing through the diffusion barrier. Furthermore, the diffusion barrier may be further adapted to suppress a whisker-type formation in the bump layer.