H01L2924/01084

Dicing Method for Stacked Semiconductor Devices
20210358808 · 2021-11-18 ·

A semiconductor structure includes a first device and a second device bonded on the first device. The first device has a first sidewall distal to the second device and a second sidewall proximal to the second device. A surface roughness of the second sidewall is larger than a surface roughness of the first sidewall.

Dicing Method for Stacked Semiconductor Devices
20210358808 · 2021-11-18 ·

A semiconductor structure includes a first device and a second device bonded on the first device. The first device has a first sidewall distal to the second device and a second sidewall proximal to the second device. A surface roughness of the second sidewall is larger than a surface roughness of the first sidewall.

Alternative compositions for high temperature soldering applications
11440142 · 2022-09-13 · ·

Invention compositions are a replacement for high melting temperature solder pastes and preforms in high operating temperature and step-soldering applications. In the use of the invention, a mixture of metallic powders reacts below 350 degrees C. to form a dense metallic joint that does not remelt at the original process temperature.

Alternative compositions for high temperature soldering applications
11440142 · 2022-09-13 · ·

Invention compositions are a replacement for high melting temperature solder pastes and preforms in high operating temperature and step-soldering applications. In the use of the invention, a mixture of metallic powders reacts below 350 degrees C. to form a dense metallic joint that does not remelt at the original process temperature.

METHOD FOR MICROSTRUCTURE MODIFICATION OF CONDUCTING LINES

A method for microstructure modification of conducting lines is provided. An electroplating process is performed to deposit the metal thin film/conducting line(s) with a face-centered cubic (FCC) structure and a preferred crystallographic orientation over a surface of a substrate. The metal thin film/ conducting line(s) is subsequently subjected to a thermal annealing process to modify its microstructure with the grain sizes in a range of 5 μm to 100 μm. The thermal annealing process is conducted at the temperature of above 25 degrees Celsius and below 240 degrees Celsius.

Dicing method for stacked semiconductor devices

A method includes providing first and second wafers; forming a first device layer in a top portion of the first wafer; forming a second device layer in a top portion of the second wafer; forming a first groove in the first device layer; forming a second groove in the second device layer; bonding the first and second wafers together after at least one of the first and second grooves is formed; and dicing the bonded first and second wafers by a cutting process, wherein the cutting process cuts through the first and second grooves.

Dicing method for stacked semiconductor devices

A method includes providing first and second wafers; forming a first device layer in a top portion of the first wafer; forming a second device layer in a top portion of the second wafer; forming a first groove in the first device layer; forming a second groove in the second device layer; bonding the first and second wafers together after at least one of the first and second grooves is formed; and dicing the bonded first and second wafers by a cutting process, wherein the cutting process cuts through the first and second grooves.

Method for transient liquid-phase bonding between metal materials using a magnetic force

Disclosed is a method for transient liquid-phase bonding between metal materials using a magnetic force. In particular, in the method, a magnetic force is applied to a transient liquid-phase bonding process, thereby shortening a transient liquid-phase bonding time between the metal materials, and obtaining high bonding strength. To this end, an attractive magnetic force is applied to a ferromagnetic base while a repulsive magnetic force is applied to a diamagnetic base, thereby to accelerate diffusion. This may reduce a bonding time during a transient liquid-phase bonding process between two bases and suppress formation of Kirkendall voids and voids and suppress a layered structure of an intermetallic compound, thereby to increase a bonding strength.

Method for transient liquid-phase bonding between metal materials using a magnetic force

Disclosed is a method for transient liquid-phase bonding between metal materials using a magnetic force. In particular, in the method, a magnetic force is applied to a transient liquid-phase bonding process, thereby shortening a transient liquid-phase bonding time between the metal materials, and obtaining high bonding strength. To this end, an attractive magnetic force is applied to a ferromagnetic base while a repulsive magnetic force is applied to a diamagnetic base, thereby to accelerate diffusion. This may reduce a bonding time during a transient liquid-phase bonding process between two bases and suppress formation of Kirkendall voids and voids and suppress a layered structure of an intermetallic compound, thereby to increase a bonding strength.

SEMICONDUCTOR DEVICE WITH CONNECTING STRUCTURE HAVING A STEP-SHAPED CONDUCTIVE FEATURE AND METHOD FOR FABRICATING THE SAME
20210287937 · 2021-09-16 ·

The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a first semiconductor structure, a first connecting structure, and a second semiconductor structure positioned on the first connecting structure. The first connecting structure includes a first connecting insulating layer positioned on the first semiconductor structure, two first conductive layers positioned in the first connecting insulating layer, and a first porous layer positioned between the two first conductive layers. The second semiconductor structure is positioned on the first connecting structure and includes two second conductive features positioned on the two first conductive layers. The first conductive layer has a first width, the second conductive feature has a second width greater than the first width, and the different width forms a step-shaped cross-sectional profile near an interface of the first conductive layer and the second conductive feature.