A three-dimensional (3D) bonded semiconductor structure is provided in which a first bonding oxide layer of a first semiconductor structure is bonded to a second bonding oxide layer of a second semiconductor structure. Each of the first and second bonding oxide layers has a metallic bonding structure embedded therein, wherein each metallic bonding structure contains a columnar grain microstructure. Furthermore, at least one columnar grain extends across a bonding interface that is present between the metallic bonding structures. The presence of the columnar grain microstructure in the metallic bonding structures, together with at least one columnar grain microstructure extending across the bonding interface between the two bonded metallic bonding structures, can provide a 3D bonded structure having mechanical bonding strength and electrical performance enhancements.

A three-dimensional (3D) bonded semiconductor structure is provided in which a first bonding oxide layer of a first semiconductor structure is bonded to a second bonding oxide layer of a second semiconductor structure. Each of the first and second bonding oxide layers has a metallic bonding structure embedded therein, wherein each metallic bonding structure contains a columnar grain microstructure. Furthermore, at least one columnar grain extends across a bonding interface that is present between the metallic bonding structures. The presence of the columnar grain microstructure in the metallic bonding structures, together with at least one columnar grain microstructure extending across the bonding interface between the two bonded metallic bonding structures, can provide a 3D bonded structure having mechanical bonding strength and electrical performance enhancements.

A three-dimensional (3D) bonded semiconductor structure is provided in which a first bonding oxide layer of a first semiconductor structure is bonded to a second bonding oxide layer of a second semiconductor structure. Each of the first and second bonding oxide layers has a metallic pad structure embedded therein, wherein each metallic pad structure has a columnar grain microstructure. A metal resistor structure is embedded in one of the first bonding oxide layer or the second bonding oxide and is present between the first and second metallic pad structures.

A three-dimensional (3D) bonded semiconductor structure is provided in which a first bonding oxide layer of a first semiconductor structure is bonded to a second bonding oxide layer of a second semiconductor structure. Each of the first and second bonding oxide layers has a metallic pad structure embedded therein, wherein each metallic pad structure has a columnar grain microstructure. A metal resistor structure is embedded in one of the first bonding oxide layer or the second bonding oxide and is present between the first and second metallic pad structures.

A three-dimensional (3D) bonded semiconductor structure is provided in which a first bonding oxide layer of a first semiconductor structure is bonded to a second bonding oxide layer of a second semiconductor structure. Each of the first and second bonding oxide layers has a metallic bonding structure embedded therein, wherein each metallic bonding structure contains a columnar grain microstructure. Furthermore, at least one columnar grain extends across a bonding interface that is present between the metallic bonding structures. The presence of the columnar grain microstructure in the metallic bonding structures, together with at least one columnar grain microstructure extending across the bonding interface between the two bonded metallic bonding structures, can provide a 3D bonded structure having mechanical bonding strength and electrical performance enhancements.

A three-dimensional (3D) bonded semiconductor structure is provided in which a first bonding oxide layer of a first semiconductor structure is bonded to a second bonding oxide layer of a second semiconductor structure. Each of the first and second bonding oxide layers has a metallic bonding structure embedded therein, wherein each metallic bonding structure contains a columnar grain microstructure. Furthermore, at least one columnar grain extends across a bonding interface that is present between the metallic bonding structures. The presence of the columnar grain microstructure in the metallic bonding structures, together with at least one columnar grain microstructure extending across the bonding interface between the two bonded metallic bonding structures, can provide a 3D bonded structure having mechanical bonding strength and electrical performance enhancements.

A three-dimensional (3D) bonded semiconductor structure is provided in which a first bonding oxide layer of a first semiconductor structure is bonded to a second bonding oxide layer of a second semiconductor structure. Each of the first and second bonding oxide layers has a metallic pad structure embedded therein, wherein each metallic pad structure has a columnar grain microstructure. A metal resistor structure is embedded in one of the first bonding oxide layer or the second bonding oxide and is present between the first and second metallic pad structures.

A three-dimensional (3D) bonded semiconductor structure is provided in which a first bonding oxide layer of a first semiconductor structure is bonded to a second bonding oxide layer of a second semiconductor structure. Each of the first and second bonding oxide layers has a metallic pad structure embedded therein, wherein each metallic pad structure has a columnar grain microstructure. A metal resistor structure is embedded in one of the first bonding oxide layer or the second bonding oxide and is present between the first and second metallic pad structures.

An integrated circuit device includes a wiring structure, first and second inter-wiring insulating layers, redistributions patterns and a cover insulating layer. The wiring structure includes wiring layers having a multilayer wiring structure and via plugs. The first inter-wiring insulating layer that surrounds the wiring structure on a substrate. The second inter-wiring insulating layer is on the first inter-wiring insulating layer, and redistribution via plugs are connected to the wiring structure through the second inter-wiring insulating layer. The redistribution patterns includes pad patterns and dummy patterns on the second inter-wiring insulating layer. Each patterns has a thickness greater than a thickness of each wiring layer. The cover insulating layer covers some of the redistribution patterns. The dummy patterns are in the form of lines that extend in a horizontal direction parallel to the substrate.

An integrated circuit device includes a wiring structure, first and second inter-wiring insulating layers, redistributions patterns and a cover insulating layer. The wiring structure includes wiring layers having a multilayer wiring structure and via plugs. The first inter-wiring insulating layer that surrounds the wiring structure on a substrate. The second inter-wiring insulating layer is on the first inter-wiring insulating layer, and redistribution via plugs are connected to the wiring structure through the second inter-wiring insulating layer. The redistribution patterns includes pad patterns and dummy patterns on the second inter-wiring insulating layer. Each patterns has a thickness greater than a thickness of each wiring layer. The cover insulating layer covers some of the redistribution patterns. The dummy patterns are in the form of lines that extend in a horizontal direction parallel to the substrate.