A semiconductor package of a pin-grid-array type includes a bump pad on a first substrate, a metal socket on a second substrate, a core material for reverse reflow on the bump pad, and solder paste or a solder bump forming a solder layer on the core material for reverse reflow. The solder paste or the solder bump is in contact with the bump pad. The core material for reverse reflow and the solder paste or the solder bump bonded to the core material for reverse reflow are used as a pin and detachably attached to the metal socket. The core material for reverse reflow includes a core, a first metal layer directly coated on the core, and a second metal layer directly coated on the first metal layer.

A semiconductor package of a pin-grid-array type includes a bump pad on a first substrate, a metal socket on a second substrate, a core material for reverse reflow on the bump pad, and solder paste or a solder bump forming a solder layer on the core material for reverse reflow. The solder paste or the solder bump is in contact with the bump pad. The core material for reverse reflow and the solder paste or the solder bump bonded to the core material for reverse reflow are used as a pin and detachably attached to the metal socket. The core material for reverse reflow includes a core, a first metal layer directly coated on the core, and a second metal layer directly coated on the first metal layer.

An underfill film for semiconductor packages and a method for manufacturing a semiconductor package using the underfill film are disclosed. The underfill film includes an adhesive layer in which a melt viscosity and an onset temperature are adjusted to a predetermined range such that production efficiency may be improved by simplifying packaging process of the semiconductor packages. Also the underfill film and the manufacturing process may improve connection reliability of the package.

An underfill film for semiconductor packages and a method for manufacturing a semiconductor package using the underfill film are disclosed. The underfill film includes an adhesive layer in which a melt viscosity and an onset temperature are adjusted to a predetermined range such that production efficiency may be improved by simplifying packaging process of the semiconductor packages. Also the underfill film and the manufacturing process may improve connection reliability of the package.

A display device includes a first substrate that includes a first electrode, a second substrate disposed under the first substrate and that includes, a second electrode that overlaps the first electrode, and an anisotropic conductive film disposed between the first substrate and the second substrate. The anisotropic conductive film includes an insulating resin layer and a plurality of conductive particles in the insulating resin layer. The conductive particles include first conductive particles that overlap the first electrode and the second electrode, and second conductive particles other than the first conductive particles. Each of the first conductive particles and the second conductive particles includes a first flat surface, a second flat surface that faces the first flat surface, and a curved surface rounded between the first flat surface and the second flat surface.

A display device includes a first substrate that includes a first electrode, a second substrate disposed under the first substrate and that includes, a second electrode that overlaps the first electrode, and an anisotropic conductive film disposed between the first substrate and the second substrate. The anisotropic conductive film includes an insulating resin layer and a plurality of conductive particles in the insulating resin layer. The conductive particles include first conductive particles that overlap the first electrode and the second electrode, and second conductive particles other than the first conductive particles. Each of the first conductive particles and the second conductive particles includes a first flat surface, a second flat surface that faces the first flat surface, and a curved surface rounded between the first flat surface and the second flat surface.

A semiconductor package manufacturing method of the disclosure includes providing a multilayer adhesive film, forming a notch and a plurality of openings extending through the multilayer adhesive film, attaching the multilayer adhesive film to a back side of a wafer to form a stack, separating the stack into a plurality of individual stacks, separating each of the plurality of individual stacks into an upper stack and a lower stack, providing a substrate on which a first semiconductor chip is mounted, and stacking the upper stack on the first semiconductor chip. The upper stack includes a second semiconductor chip and a die attach pattern covering a portion of a back surface of the second semiconductor chip. A first side surface of the die attach pattern is aligned with a first side surface of the first semiconductor chip.

A semiconductor package manufacturing method of the disclosure includes providing a multilayer adhesive film, forming a notch and a plurality of openings extending through the multilayer adhesive film, attaching the multilayer adhesive film to a back side of a wafer to form a stack, separating the stack into a plurality of individual stacks, separating each of the plurality of individual stacks into an upper stack and a lower stack, providing a substrate on which a first semiconductor chip is mounted, and stacking the upper stack on the first semiconductor chip. The upper stack includes a second semiconductor chip and a die attach pattern covering a portion of a back surface of the second semiconductor chip. A first side surface of the die attach pattern is aligned with a first side surface of the first semiconductor chip.

The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate, a first pad positioned above the substrate, and a first redistribution structure including a first redistribution conductive layer positioned on the first pad and a first redistribution thermal release layer positioned on the first redistribution conductive layer. The first redistribution thermal release layer is configured to sustain a thermal resistance between about 0.04° C. cm.sup.2/Watt and about 0.25° C. cm.sup.2/Watt.

The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate, a first pad positioned above the substrate, and a first redistribution structure including a first redistribution conductive layer positioned on the first pad and a first redistribution thermal release layer positioned on the first redistribution conductive layer. The first redistribution thermal release layer is configured to sustain a thermal resistance between about 0.04° C. cm.sup.2/Watt and about 0.25° C. cm.sup.2/Watt.