Aspects described herein include a method of fabricating an optical component, the optical component, and a method of operating the optical component. A method includes electrically coupling a first laser channel and a second laser channel of a laser die to different electrical leads and testing (i) a first optical coupling of the first laser channel and a second optical coupling of the second laser channel or (ii) a first spectral performance of the first laser channel and a second spectral performance of the second laser channel. The method also includes optically aligning an optical fiber with the first laser channel and designating the second laser channel as a heater element for the first laser channel based at least in part on (i) the first optical coupling being greater than the second optical coupling or (ii) the first spectral performance relative to the second spectral performance

A semiconductor layer structure may include a substrate, a blocking layer disposed over the substrate, and one or more epitaxial layers disposed over the blocking layer. The blocking layer may have a thickness of between 50 nanometers (nm) and 4000 nm. The blocking layer may be configured to suppress defects from the substrate propagating to the one or more epitaxial layers. The one or more epitaxial layers may include a quantum-well layer that includes a quantum-well intermixing region formed using a high temperature treatment.

Aspects described herein include a method of fabricating an optical component. The method comprises electrically coupling different laser channels of a laser die to different electrical leads, testing a respective optical coupling of each of the different laser channels, optically aligning an optical fiber with a first laser channel of the different laser channels having the greatest optical coupling, and designating a second laser channel of the different laser channels as a heater element for the first laser channel.

A method for production of an optoelectronic device includes fabricating a plurality of vertical emitters on a semiconductor substrate. Respective top surfaces of the emitters are bonded to a heat sink, after which the semiconductor substrate is removed below respective bottom surfaces of the emitters. Both anode and cathode contacts are attached to the bottom surfaces so as to drive the emitters to emit light from the bottom surfaces. In another embodiment, the upper surface of a semiconductor substrate is bonded to a carrier substrate having through-holes that are aligned with respective top surfaces of the emitters, after which the semiconductor substrate is removed below respective bottom surfaces of the emitters, and the respective bottom surfaces of the emitters are bonded to a heat sink.

A method and system for analyzing Vertical-Cavity Surface-Emitting Lasers (VCSELs) on a wafer are provided. An illustrative method of is provided that includes: applying a stimulus to each of the plurality of VCSELs on the wafer; measuring, for each of the plurality of VCSELs, two or more VCSEL parameters responsive to the stimulus; correlating the measured two or more VCSEL parameters to define a value of a common performance characteristic; and identifying clusters of VCSELs having similar values of the common performance characteristic. The clusters of VCSELs may be determined to collectively meet or not meet an optical performance requirement defined for the VCSELs on the wafer.

A method and system for large scale Vertical-Cavity Surface-Emitting Laser (VCSEL) binning from wafers to be compatible with a Clock-Data Recovery Unit (CDRU) and/or a VCSEL driver are provided. An illustrative method of binning is provided that includes: for at least a portion of VCSELs on a wafer, measuring a set of representative parameters of the VCSELs, of predetermined DC or small-signal values, and sorting the measured VCSELs into clusters according to the measured set of representative parameters of the VCSELs; further sorting the clusters into sub-groups that comply with specifications of the VCSEL driver; and providing a feedback signal to the CDRU for equalizing control signals provided to the VCSEL driver.

A semiconductor layer structure may include a substrate, a blocking layer disposed over the substrate, and one or more epitaxial layers disposed over the blocking layer. The blocking layer may have a thickness of between 50 nanometers (nm) and 4000 nm. The blocking layer may be configured to suppress defects from the substrate propagating to the one or more epitaxial layers. The one or more epitaxial layers may include a quantum-well layer that includes a quantum-well intermixing region formed using a high temperature treatment.

A method for manufacturing a monolithically integrated semiconductor optical integrated element comprising a DFB laser, an EA modulator, and a SOA disposed in a light emitting direction, comprising the step of forming a semiconductor wafer on which the elements are two-dimensionally arrayed and aligned the optical axes; cleaving the semiconductor wafer along a plane orthogonal to the light emitting direction to form a semiconductor bar including a plurality of the elements arranged one-dimensionally along a direction orthogonal to the light emitting direction such that the elements adjacent to each other share an identical cleavage end face as a light emission surface; inspecting the semiconductor bar by driving the SOA and the DFB laser through a connection wiring part together; and separating out the semiconductor bar after the inspection to cut the connection wiring part connecting the electrode of the SOA and the DFB laser to isolate from each other.

Systems, methods, and devices are described for in-situ testing of vertical-cavity surface-emitting lasers (VCSELs), VCSEL arrays or laser diodes (each a laser). Testing may comprise bias voltage measurements of one or more lasers. Embodiments may comprise one of a laser, a driver circuit providing a bipolar drive to the laser, and a sensing circuit to measure and/or monitor damage or degradation of the laser. The bipolar drive may comprise a pulsed forward bias output configured to produce a light output during an on-time of the laser, and a pulsed reverse bias output during an off-time of the pulsed forward bias output. The pulsed outputs may comprise a variable, chirped frequency. One or more of a reverse leakage current, and a junction temperature may be measured to monitor a state of health of the laser.

A testing device may include a stage associated with holding an emitter wafer during testing of an emitter. The stage may be arranged such that light emitted by the emitter passes through the stage. The testing device may include a heat sink arranged such that the light emitted by the emitter during the testing is emitted in a direction away from the heat sink, and such that a first surface of the heat sink is near a surface of the emitter wafer during the testing but does not contact the surface of the emitter wafer. The testing device may include a probe card, associated with performing the testing of the emitter, that is arranged over a second surface of the heat sink such that, during the testing of the emitter, a probe of the probe card contacts a probe pad for the emitter through an opening in the heat sink.