A wafer may comprise a substrate layer and a plurality of vertical cavity surface emitting lasers (VCSELs) formed on or within the substrate layer. A respective trench-to-trench distance associated with the plurality of VCSELs may vary across the wafer based on a predicted variation of an oxidation rate of an oxidation layer across the wafer.

A photonics device includes a silicon wafer including a cathode region, an anode region, a trench region formed between the cathode region and the anode region, and a linear ridge formed between the cathode region and the anode region. A laser diode chip is mounted on the silicon wafer. A conductor layer disposed between the silicon wafer and the laser diode chip includes a first section disposed between the laser diode chip and the cathode region on a first side of the trench to electrically connect the laser diode chip to a cathode electrode of the photonics device and a second section disposed between the anode region and the laser diode chip on a second side of the trench to electrically connect the laser diode chip to an anode electrode of the photonics device.

Gallium and nitrogen containing optical devices operable as laser diodes and methods of forming the same are disclosed. The devices include a gallium and nitrogen containing substrate member, which may be semipolar or non-polar. The devices include a chip formed from the gallium and nitrogen substrate member. The chip has a width and a length, a dimension of less than 150 microns characterizing the width of the chip. The devices have a cavity oriented substantially parallel to the length of the chip.

A photonics device includes a silicon wafer including a cathode region, an anode region, a trench region formed between the cathode region and the anode region, and a linear ridge formed between the cathode region and the anode region. A laser diode chip is mounted on the silicon wafer. A conductor layer disposed between the silicon wafer and the laser diode chip includes a first section disposed between the laser diode chip and the cathode region on a first side of the trench to electrically connect the laser diode chip to a cathode electrode of the photonics device and a second section disposed between the anode region and the laser diode chip on a second side of the trench to electrically connect the laser diode chip to an anode electrode of the photonics device.

An emitter array, may comprise a first set of emitters that has a nominal optical output power at an operating voltage. The emitter array may comprise a second set of emitters that has substantially less than the nominal optical output power or no optical output power at the operating voltage. The first set of emitters and the second set of emitters may be interleaved with each other to form a two-dimensional regular pattern of emitters that emits a random pattern of light at the nominal optical output power at the operating voltage. The first set of emitters and the second set of emitters may be electrically connected in parallel.

A testing device may include a stage associated with holding an emitter wafer during testing of an emitter. The stage may be arranged such that light emitted by the emitter passes through the stage. The testing device may include a heat sink arranged such that the light emitted by the emitter during the testing is emitted in a direction away from the heat sink, and such that a first surface of the heat sink is near a surface of the emitter wafer during the testing but does not contact the surface of the emitter wafer. The testing device may include a probe card, associated with performing the testing of the emitter, that is arranged over a second surface of the heat sink such that, during the testing of the emitter, a probe of the probe card contacts a probe pad for the emitter through an opening in the heat sink.

A photonics device includes a silicon wafer including an upper surface region, a trench region, and a ridge structure. The ridge structure electrically isolates the upper surface region from the trench region. A laser diode chip flip-bonded onto the silicon wafer includes an electrode region bonded with the upper surface region, a gain region bonded with the trench region, and an isolation region bonded with the ridge structure. The isolation region electrically isolates the gain region from the electrode region. A conductor layer arranged between the silicon wafer and the laser diode chip includes a first section electrically connecting the gain region to a first electrode of the photonics device and a second section configured to electrically connect the electrode region to a second electrode of the photonics device. The first section is electrically isolated from the second section by the isolation region.

An optical package having a patterned submount, an optoelectronic device mounted to the patterned submount, a spacer affixed on one side to the patterned submount, the spacer having a bore hole therethrough wherein the optoelectronic device is positioned, and an optical element affixed to the spacer on a side opposite the patterned submount and covering the spacer bore hole. The patterned submount may be a circuit board. The optoelectronic device may be a VCSEL. The spacer may be affixed to the circuit board, for example, using an epoxy preform or an adhesive laminate. The spacer may, for example, be manufactured from a sheet of stainless steel or from a circuit board. The optical element may be, for example, a diffuser, a concave lens, a convex lens, a holographic element, polarizers, or diffraction gratings. The optical element may be affixed to the spacer using an epoxy preform or an adhesive laminate.

A measurement method of a surface-emitting laser includes a step of causing a surface-emitting laser to emit light and a step of positioning an optical axis of an optical system on each of a plurality of positions of the surface-emitting laser and measuring a spectrum at each of the plurality of positions.

An array device manufacturing method includes the steps of forming a plurality of optical elements on a wafer; inspecting the plurality of optical elements; defining dicing lines on the basis of a result of the inspection such that an array device composed entirely of one or more non-defective ones of the plurality of optical elements is obtained, the one or more non-defective ones being determined to be non-defective in the inspection; and forming the array device by dicing the wafer along the dicing lines.